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I'd argue that it's both ugly and resource heavy, but "ugly" would be a matter of taste. I just have a very strong aversion for IDE's that fail to prioritize t
by arghwhat 8y ago
I'd argue that it's both ugly and resource heavy, but "ugly" would be a matter of taste.
I just have a very strong aversion for IDE's that fail to prioritize text editing, permanently wasting space on all sorts of buttons and knobs that are only needed 0.1% of the time. It doesn't help that they often also fail to be responsive.
- moftz 8y agoI don't write much VHDL or Verilog for my work. Most of it is combining cores together that are either from the vendor or are generated using Simulink. Occasionally there needs to be some glue logic to link some blocks together and all the code in the softcore processor needs to be written in C but most of the development is based on wiring up blocks in Libero's GUI.