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What's the tooling like for a typical, production-quality FPGA project nowadays? Last I checked, which is admittedly a couple of years ago (and I didn't dive in

What's the tooling like for a typical, production-quality FPGA project nowadays? Last I checked, which is admittedly a couple of years ago (and I didn't dive in very deeply), it was a horrible mix of badly programmed vendor-specific Windows-only GUI tools. It seemed a lot like the embedded processor market where every single vendor has their own lock-in strategy and the whole ecosystem suffers for it. Has this improved in the meantime?

tails4e 8y ago
Vivado us actually very good for EDA, and especially for one you can get for free (webpack). Compare it to design compiler for basic synthesis- now that is an ugly gui! Vivado had made great strides to integrate ip/rtl/synthesis/pnr/debug with cross probing between stages and great visual presentation of results. Try do any of this with 'industry standard' tools like design compiler and you will see just how good it is comparatively.
lnsru 8y ago
The colleagues are telling me, that this ugly GUI works nowadays under Linux too. You also can script much using tcl commands. I have it running on Windows and it works somehow, but I am not happy user:-/
- xfer 8y ago
  Xilinx Vivado is not ugly; but resource heavy; so most people stick to tcl scripting.
  - tails4e 8y ago
    Agreed it's a very well designed gui, but seems to gobble memory. If you have a 32gb linux machine it's excellent.
    - lnsru 8y ago
      Going from IP catalog to pin planner is not the easiest task. Or setting bitstream properties. Some settings are accessible from special locations, and this isn’t very intuitive. It’s easy when you know all these details.
  - arghwhat 8y ago
    I'd argue that it's both ugly and resource heavy, but "ugly" would be a matter of taste. I just have a very strong aversion for IDE's that fail to prioritize text editing, permanently wasting space on all sorts of buttons and knobs that are only needed 0.1% of the time. It doesn't help that they often also fail to be responsive.
    - moftz 8y ago
      I don't write much VHDL or Verilog for my work. Most of it is combining cores together that are either from the vendor or are generated using Simulink. Occasionally there needs to be some glue logic to link some blocks together and all the code in the softcore processor needs to be written in C but most of the development is based on wiring up blocks in Libero's GUI.
pjc50 8y ago
It's still like that. It's an extremely conservative industry.
setquk 8y ago
Tooling is cheaper and more reliable at least. Honestly I find the situation better than 20 years ago now on the embedded processor front. The worst thing we have now is broken shitty standard libs and compilers. You can dodge around those by picking assembly (PIC for example, mpasm is actually ok) or platforms with GCC implementations (ARM/AVR)
aylons 8y ago
Windows only tools? You must have been using Altera options (I briefly maintained the page for Quartus compatibility at wine, circa 2004). Even them have had Linux support for a while, Xilinx has Linux support for as far as I remember, at least some ten years. The ecosystem is terrible, I agree with you. However, the lock in is restricted for the final synthesis part. Simulation is mostly done with (very expensive) third party tools, such as Mentor Graphics Modelsim, and in professional settings the build is automated to a point that opening the vendor's GUI is frowned upon. There are some quality open sources tools on FPGA build automation, but most places I had contact with have their own internal tools.
- stochastic_monk 8y ago
  I know someone who’s implemented some string algorithms for FPGA with verilog. Is writing the code distinct from the tooling you’re referring to, or simply an open source flavor of deployment? I haven’t done any FPGA work.
  - deleted 8y ago
    [deleted]
  - aylons 8y ago
    When he talks about Verilog, he is referring to the language used for development and implementation. We're talking about a different part of the chain, something akin to the compiler, make, cmake and alike. Of course, there's some dynamic between the tool chain and the language itself. For example, it doesn't matter if the language has the coolest feature if the compiler does not support it, and the toolchain will help you manage more complex code safely.
orbifold 8y ago
All the FPGA tools by Xilinx work well under Linux and Vivado is actually quite pleasant to use. Almost all of the EDA tools can be scripted with TCL (cadence has a host of other DSL aswell) so you don’t need to use the GUI if you don’t want to.
- arghwhat 8y ago
  Vivado is absolutely terrible, especially the GUI. Our toolchain at work is set up so that it can be entirely avoided, with developers only writing Verilog in their editor of choice, and calling make or pushing to Jenkins when they want results. And then they go home, as it takes a full day to build a product on our server farm. Sim/others is done with third-party products. I recall one Xilinx event where a Xilinx presenter asked how many people were using the Vivado IDE for development. IIRC, only a single hand was held up. Vivado isn't worse than the competition, though. Intel/Altera's offering is also a steaming pile of crap (we evaluate the competing platform every once in a while when we decide what FPGAs to use for new products). I don't know why all FPGA tooling sucks, but it does.
  - xu3kev 8y ago
    Writing Verilog in the editor of choice then calling make and pushing to Jenkins sounds amazing. Could you elaborate further on the methods and best practices to develop FPGA without Vivado IDE?(As your story indicate that there are many people can do this in the industry.) I'd like to know more about the setup.
  - planteen 8y ago
    And don't get me started on trying to version control a Vivado project. It's like they didn't even consider the possibility of committing a project to source control! I last used Vivado about 2 years ago but doubt things have changed much. It really makes me wonder how Xilinx does it in-house.
    - matt_the_bass 8y ago
      I was just about to say this! We’ve recently hacked our Vivado project into git. This requires unpacking all packages and ignoring compiled packages. Plus a bunch of bat files to handle house keeping. A big part of the issue is compiling packages. I think this is a thing because synthesis takes so long. Until synthesis time is reduced, I think we’ll see these hack-y solutions.
baybal2 8y ago
Lattice was the one
arghwhat 8y ago
Well, it certainly hasn't been Windows specific for over a decade, but it's definitely bad. Comparing it to software development toolchains, one might even go as far as calling it a steaming pile of horsedung. However, a lot of it can be hidden, making the flow: 1. Write verilog in your editor of choice, 2. Call make. 3. Come back tomorrow to check the result.

tails4e 8y ago

Vivado us actually very good for EDA, and especially for one you can get for free (webpack). Compare it to design compiler for basic synthesis- now that is an ugly gui! Vivado had made great strides to integrate ip/rtl/synthesis/pnr/debug with cross probing between stages and great visual presentation of results. Try do any of this with 'industry standard' tools like design compiler and you will see just how good it is comparatively.

lnsru 8y ago

The colleagues are telling me, that this ugly GUI works nowadays under Linux too. You also can script much using tcl commands. I have it running on Windows and it works somehow, but I am not happy user:-/

xfer 8y ago
Xilinx Vivado is not ugly; but resource heavy; so most people stick to tcl scripting.
- tails4e 8y ago
  Agreed it's a very well designed gui, but seems to gobble memory. If you have a 32gb linux machine it's excellent.
  - lnsru 8y ago
    Going from IP catalog to pin planner is not the easiest task. Or setting bitstream properties. Some settings are accessible from special locations, and this isn’t very intuitive. It’s easy when you know all these details.
- arghwhat 8y ago
  I'd argue that it's both ugly and resource heavy, but "ugly" would be a matter of taste. I just have a very strong aversion for IDE's that fail to prioritize text editing, permanently wasting space on all sorts of buttons and knobs that are only needed 0.1% of the time. It doesn't help that they often also fail to be responsive.
  - moftz 8y ago
    I don't write much VHDL or Verilog for my work. Most of it is combining cores together that are either from the vendor or are generated using Simulink. Occasionally there needs to be some glue logic to link some blocks together and all the code in the softcore processor needs to be written in C but most of the development is based on wiring up blocks in Libero's GUI.

pjc50 8y ago

It's still like that. It's an extremely conservative industry.

setquk 8y ago

Tooling is cheaper and more reliable at least. Honestly I find the situation better than 20 years ago now on the embedded processor front. The worst thing we have now is broken shitty standard libs and compilers. You can dodge around those by picking assembly (PIC for example, mpasm is actually ok) or platforms with GCC implementations (ARM/AVR)

aylons 8y ago

Windows only tools? You must have been using Altera options (I briefly maintained the page for Quartus compatibility at wine, circa 2004). Even them have had Linux support for a while, Xilinx has Linux support for as far as I remember, at least some ten years. The ecosystem is terrible, I agree with you. However, the lock in is restricted for the final synthesis part. Simulation is mostly done with (very expensive) third party tools, such as Mentor Graphics Modelsim, and in professional settings the build is automated to a point that opening the vendor's GUI is frowned upon. There are some quality open sources tools on FPGA build automation, but most places I had contact with have their own internal tools.

stochastic_monk 8y ago
I know someone who’s implemented some string algorithms for FPGA with verilog. Is writing the code distinct from the tooling you’re referring to, or simply an open source flavor of deployment? I haven’t done any FPGA work.
- deleted 8y ago
  [deleted]
- aylons 8y ago
  When he talks about Verilog, he is referring to the language used for development and implementation. We're talking about a different part of the chain, something akin to the compiler, make, cmake and alike. Of course, there's some dynamic between the tool chain and the language itself. For example, it doesn't matter if the language has the coolest feature if the compiler does not support it, and the toolchain will help you manage more complex code safely.

orbifold 8y ago

All the FPGA tools by Xilinx work well under Linux and Vivado is actually quite pleasant to use. Almost all of the EDA tools can be scripted with TCL (cadence has a host of other DSL aswell) so you don’t need to use the GUI if you don’t want to.

arghwhat 8y ago
Vivado is absolutely terrible, especially the GUI. Our toolchain at work is set up so that it can be entirely avoided, with developers only writing Verilog in their editor of choice, and calling make or pushing to Jenkins when they want results. And then they go home, as it takes a full day to build a product on our server farm. Sim/others is done with third-party products. I recall one Xilinx event where a Xilinx presenter asked how many people were using the Vivado IDE for development. IIRC, only a single hand was held up. Vivado isn't worse than the competition, though. Intel/Altera's offering is also a steaming pile of crap (we evaluate the competing platform every once in a while when we decide what FPGAs to use for new products). I don't know why all FPGA tooling sucks, but it does.
- xu3kev 8y ago
  Writing Verilog in the editor of choice then calling make and pushing to Jenkins sounds amazing. Could you elaborate further on the methods and best practices to develop FPGA without Vivado IDE?(As your story indicate that there are many people can do this in the industry.) I'd like to know more about the setup.
- planteen 8y ago
  And don't get me started on trying to version control a Vivado project. It's like they didn't even consider the possibility of committing a project to source control! I last used Vivado about 2 years ago but doubt things have changed much. It really makes me wonder how Xilinx does it in-house.
  - matt_the_bass 8y ago
    I was just about to say this! We’ve recently hacked our Vivado project into git. This requires unpacking all packages and ignoring compiled packages. Plus a bunch of bat files to handle house keeping. A big part of the issue is compiling packages. I think this is a thing because synthesis takes so long. Until synthesis time is reduced, I think we’ll see these hack-y solutions.

baybal2 8y ago

Lattice was the one

arghwhat 8y ago

Well, it certainly hasn't been Windows specific for over a decade, but it's definitely bad. Comparing it to software development toolchains, one might even go as far as calling it a steaming pile of horsedung. However, a lot of it can be hidden, making the flow: 1. Write verilog in your editor of choice, 2. Call make. 3. Come back tomorrow to check the result.