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I agree those features sound great. But it's difficult to practically use AVX-512 when the turbo boost throttling prohibits breaking even with an equivalent AV

I agree those features sound great. But it's difficult to practically use AVX-512 when the turbo boost throttling prohibits breaking even with an equivalent AVX/AVX2 workload. I had a small project that would trivially scale up to AVX-512 register sizes. Despite doubling the vector width, it was actually much slower than the AVX/AVX2 version in practice -- just because it had such a low turbo boost ratio when running AVX-512 instructions.

wolfgke 8y ago
> But it's difficult to practically use AVX-512 when the turbo boost throttling prohibits breaking even with an equivalent AVX/AVX2 workload. This was also a problem with the first AVX implementations, so this is very typical: In the first generation, Intel makes such an instruction set extension available, so that one can write applications that make use of it (though they will usually not be faster, sometimes even slower). In the following generation this new feature is made fast, so that the newly written algorithms really get to profit from it.