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Intel's biggest mistake over the past 10 years was not to open it's foundry services sooner now it's custom foundry services are nearly irrelevant outside of a

Intel's biggest mistake over the past 10 years was not to open it's foundry services sooner now it's custom foundry services are nearly irrelevant outside of a few niche markets. Mobile SoC design and being answerable to a huge number of very large customers forced fabs to evolve their processes in a way where market forces and customer demand forces requirements rather than office politics. Intel has still an edge on many parts of the manufacturing process but as far as the lithography goes they've lost this round. Luckily for them their 10nm was much more ambitious than any of the 7nm designs and they are facing problems that other fabs will not face until their 5nm and beyond processes. Intel is also fighting a much tougher fight now TSMC was always good (better than AMD/GloFo) but now you also have the Alliance which is IBM/Samsung/GloFo which combine resources on process R&D. GloFo botched their 20/22nm process and had to scrap it completely and if they couldn't use Samsung's 20nm process and call it 14nm AMD's Zen would likely would never have materialized because of the WSA. And this is essentially the gist of things GloFo/Samsung/IBM are essentially a united front, TSMC is as capable as ever and what all of these 4 (and more) share in common is that they answer to external customers so if something doesn't work there is a much bigger pressure to drop it and find something that would instead of sinking more and more cost into it because of internal politics.

rbinv 8y ago
Aren't all manufacturers dependent on ASML's stuff, anyway? As far as I know, none of the big guys are developing their own EUV tech. Where's the edge?
- ylk 8y ago
  Got told once* that they have specific teams working with Intel, etc. with pretty strict rules, where if you ever work for one of those teams you can't ever work for one of the others. So if I got it right ASML develops their EUV tech, etc and then those teams build things on top of that with Intel, TSMC and so on. *at an ASML booth at a kind of job fair at my uni
- dogma1138 8y ago
  The litography is just one part of the manufacturing process and there are many ways to apply the same tech. Also the development as mentioned below is completely segregated between teams.
kingosticks 8y ago
Last time we were vendor shopping we considered Intel and had an in-person meeting. I'm not sure why they bothered turning up as they were nowhere near competitive. It was pretty clear they were not interested in any thing that involved any work from them. If only someone else could offer EMIB technology...
Symmetry 8y ago
I'm not sure that's true. Intel has managed to have a higher performance process than their competitors in part by accepting more restrictive design rules. Because their architects can work hand-in-glove with their process engineers as a new node comes up they can have two-way feedback on this and to some extent design their process around their architecture's requirements. But it's very hard for third parties to work with their main process. They do have a separate relaxed rules process for use when acting as a foundry. Pursuing the foundry route seriously would have meant Intel giving up one of its largest advantages.
kbenson 8y ago
> Luckily for them their 10nm was much more ambitious than any of the 7nm designs and they are facing problems that other fabs will not face until their 5nm and beyond processes. I've always wondered about this. What's to keep the hard won experience and knowledge of how to do cobalt from escaping into the wile and being adopted at a much higher rate by their competitors? It goes both ways I guess, and some experience and working at smaller scales can also come to Intel, but I would imagine the gains for a leg up are greater with the harder process. Sure, there are IP laws in place, but just not having to waste months (or manpower in parallel research) on paths where you can get a hint (path B is a dead end, don't devote much to it) seems like a gain in itself.
- dogma1138 8y ago
  My ex is a process improvement engineer at Intel she told me a story about considerably higher failure rate for silicon that was manufactured in a northern part of a room vs the southern part what’s more odd is that it only affected some products that shared this room in their pipeline. The cause was that the water pipes under that section would impact that part of the process because of mechanical vibration the reason why it didn’t impact all processes because they were tied to the cooling system and it only had an effect when other procsses put stress on it. These vibaration were apparently so small that they couldn’t measure the difference they identified this through a process of elimination. This is a classical story of practical vs theoretical engineering the secret sauce isn’t the recepie it’s the cook. If you think about it this way if it was so easy to recreate a process through reverse engineering a few hot chips talks and poaching Intel wouldn’t be in this mess and GloFo didn’t had to scrap their 20nm process. When you almost at the level of moving atoms around the wing flaps of a butterfly start to really matter. We’re well pass the time where you had Disney animators draw transistors on sheets and copper masks were cut by hand it wouldn’t surprise me if there are no beans days at foundries these days since a fart across the building might increase your defect rate by 3%
  - nadioca 8y ago
    Thanks for sharing this story!

rbinv 8y ago

Aren't all manufacturers dependent on ASML's stuff, anyway? As far as I know, none of the big guys are developing their own EUV tech. Where's the edge?

ylk 8y ago
Got told once* that they have specific teams working with Intel, etc. with pretty strict rules, where if you ever work for one of those teams you can't ever work for one of the others. So if I got it right ASML develops their EUV tech, etc and then those teams build things on top of that with Intel, TSMC and so on. *at an ASML booth at a kind of job fair at my uni
dogma1138 8y ago
The litography is just one part of the manufacturing process and there are many ways to apply the same tech. Also the development as mentioned below is completely segregated between teams.

kingosticks 8y ago

Last time we were vendor shopping we considered Intel and had an in-person meeting. I'm not sure why they bothered turning up as they were nowhere near competitive. It was pretty clear they were not interested in any thing that involved any work from them. If only someone else could offer EMIB technology...

Symmetry 8y ago

I'm not sure that's true. Intel has managed to have a higher performance process than their competitors in part by accepting more restrictive design rules. Because their architects can work hand-in-glove with their process engineers as a new node comes up they can have two-way feedback on this and to some extent design their process around their architecture's requirements. But it's very hard for third parties to work with their main process. They do have a separate relaxed rules process for use when acting as a foundry. Pursuing the foundry route seriously would have meant Intel giving up one of its largest advantages.

kbenson 8y ago

> Luckily for them their 10nm was much more ambitious than any of the 7nm designs and they are facing problems that other fabs will not face until their 5nm and beyond processes. I've always wondered about this. What's to keep the hard won experience and knowledge of how to do cobalt from escaping into the wile and being adopted at a much higher rate by their competitors? It goes both ways I guess, and some experience and working at smaller scales can also come to Intel, but I would imagine the gains for a leg up are greater with the harder process. Sure, there are IP laws in place, but just not having to waste months (or manpower in parallel research) on paths where you can get a hint (path B is a dead end, don't devote much to it) seems like a gain in itself.

dogma1138 8y ago
My ex is a process improvement engineer at Intel she told me a story about considerably higher failure rate for silicon that was manufactured in a northern part of a room vs the southern part what’s more odd is that it only affected some products that shared this room in their pipeline. The cause was that the water pipes under that section would impact that part of the process because of mechanical vibration the reason why it didn’t impact all processes because they were tied to the cooling system and it only had an effect when other procsses put stress on it. These vibaration were apparently so small that they couldn’t measure the difference they identified this through a process of elimination. This is a classical story of practical vs theoretical engineering the secret sauce isn’t the recepie it’s the cook. If you think about it this way if it was so easy to recreate a process through reverse engineering a few hot chips talks and poaching Intel wouldn’t be in this mess and GloFo didn’t had to scrap their 20nm process. When you almost at the level of moving atoms around the wing flaps of a butterfly start to really matter. We’re well pass the time where you had Disney animators draw transistors on sheets and copper masks were cut by hand it wouldn’t surprise me if there are no beans days at foundries these days since a fart across the building might increase your defect rate by 3%
- nadioca 8y ago
  Thanks for sharing this story!