Although CMOS FETs now completely dominate the (mostly digital) crystal Si wafer manufacturing, simple NMOS and PMOS are still predominantly used in the display

Although CMOS FETs now completely dominate the (mostly digital) crystal Si wafer manufacturing, simple NMOS and PMOS are still predominantly used in the display industry. They are different because the TFT substrate (usually glass) is of course non-conductive so there is no "body effect" of a surrounding P/N well. Both a-Si (amorphous) and poly-Si (poly crystalline) dominate their respective TFT (thin film transistor) manufacturing technologies. For large scale displays (TVs) a-Si is typically used due to lower cost structure (no laser crystal annealing of the poly) while for smaller displays (mobile devices) LTPS (low temp poly-Si) is used due to higher mobility (smaller transistors). Typically NMOS is used for poly and a-Si (again for mobility reasons)... interestingly there is relatively little CMOS TFT manufacturing. Due to layer stack-up and processing yield for mobile OLED, PMOS LTPS is dominant there (both for rigid and flexible). That makes analyzing the relatively simple (2-3 metal) and larger geometry (2-3um) layouts of displays so easy and interesting for an amateur... the challenges are in figuring out all of the parasitic couplings and layout constraints that drive their design. Conveniently, old displays are free and easy to get and relatively simple (compared to de-capping a plastic package) to deconstruct and examine with a cheap microscope. Figure out how that high resolution flashing light box really works!