The FPGA architecture is not the problem here. This Chips thing works on another level of abstraction: it will generate a small RISC CPU and run the interpreter

The FPGA architecture is not the problem here. This Chips thing works on another level of abstraction: it will generate a small RISC CPU and run the interpreter it compiles. So, maybe I can try to port http://armpit.sourceforge.net/ http://armpit.sourceforge.net/ or something like this. But I don't expect not very interesting to happen. The " CPU optimization" will not result on a Lisp Machine. It will probably just compile the interpreter as usual and prune unnecessary instructions.