I'd like to understand how this system deals with failed writes. I.e. if a switch fails while a write is in progress, is it guaranteed that the in-progress writ

I'd like to understand how this system deals with failed writes. I.e. if a switch fails while a write is in progress, is it guaranteed that the in-progress write either becomes fully visible or not visible at all after the reconfiguration? How is this achieved? For example, if the head switch fails while the write is being applied on it, it's not obvious to me how the system would still guarantee that the write would not be lost. On the other hand, if the tail switch fails while the write is being applied on it, there must be some kind of rollback mechanism during the reconfiguration phase to remove the dirty write from all the preceding switches, no? Can somebody point me to the relevant section of the paper that describes how this works?