5 ms·

Perhaps it's time to resurrect wafer scale integration : https://en.wikipedia.org/wiki/Wafer-scale_integration https://en.wikipedia.org/wiki/Wafer-scale_integra

Perhaps it's time to resurrect wafer scale integration : https://en.wikipedia.org/wiki/Wafer-scale_integration https://en.wikipedia.org/wiki/Wafer-scale_integration

AstralStorm 9y ago
Which is used in the new Intel and AMD CPUs. IGPU on the same wafer. HBM for memory...
- exDM69 9y ago
  You've misunderstood. They put many chips inside one package, but the individual chips are still from different wafers.
  - AstralStorm 9y ago
    Which is actually better as it means you can excise the faulty ones easily and/or fuse the broken subunits. The main reason to integrate things is performance and it runs counter to yields. If you can have a specialized process to produce whole wafers of HBM or GPU cores with decent yields then another good one to plug them together you have a winning combination. Not understanding this is why the microprocessors from many subunits tended to fail badly. Either the design was not performant or it ran into yield issues or it has to use the exact same technology to integrate modules which was not invented or perfected at the time. So you would need a process that does everything well which is much harder than having a specialized process plus integration.
exDM69 9y ago
Maybe it's a viable research project, but still far off from reality. The largest chips that can be manufactured with current technology are about 900 mm^2 in size, but a normal 10" wafer is about 51000 mm^2, which is 50x larger than the state of the art today. An attempt to produce entire wafers in one go is also a big gamble. Any defects in the manufacturing could ruin the entire wafer rather than individual chips. Parts of the wafer could be disabled if defective, but it would result in a combinatorial explosion of different configurations. Also worth noting that in 1980 when Wafer Scale Integration was researched (without success), wafers were 4" diameter. Current wafers are 10-12" in size, which makes the process much more difficult and error prone.
- jecel 9y ago
  The two big waferscale efforts of the 1980s were by Gene Amdahl and Clive Sinclair. Amdahl did run into technical problems connecting multiple wafers to build mainframes and using lasers to swap out bad subparts (both currently solved problems and normal industry practice). But in Sinclair's case investors pulled out despite technical success because hard disk prices started falling exponentially after having stayed stable for many years. The irony was that he had done the "silicon disk" waferscale RAM just to not scare of investors with his real goal of a manycore processor on a wafer.
deepnotderp 9y ago
Cerebras is.

Perhaps it's time to resurrect wafer scale integration : https://en.wikipedia.org/wiki/Wafer-scale_integration https://en.wikipedia.org/wiki/Wafer-scale_integration

AstralStorm 9y ago

Which is used in the new Intel and AMD CPUs. IGPU on the same wafer. HBM for memory...

exDM69 9y ago
You've misunderstood. They put many chips inside one package, but the individual chips are still from different wafers.
- AstralStorm 9y ago
  Which is actually better as it means you can excise the faulty ones easily and/or fuse the broken subunits. The main reason to integrate things is performance and it runs counter to yields. If you can have a specialized process to produce whole wafers of HBM or GPU cores with decent yields then another good one to plug them together you have a winning combination. Not understanding this is why the microprocessors from many subunits tended to fail badly. Either the design was not performant or it ran into yield issues or it has to use the exact same technology to integrate modules which was not invented or perfected at the time. So you would need a process that does everything well which is much harder than having a specialized process plus integration.

exDM69 9y ago

Maybe it's a viable research project, but still far off from reality. The largest chips that can be manufactured with current technology are about 900 mm^2 in size, but a normal 10" wafer is about 51000 mm^2, which is 50x larger than the state of the art today. An attempt to produce entire wafers in one go is also a big gamble. Any defects in the manufacturing could ruin the entire wafer rather than individual chips. Parts of the wafer could be disabled if defective, but it would result in a combinatorial explosion of different configurations. Also worth noting that in 1980 when Wafer Scale Integration was researched (without success), wafers were 4" diameter. Current wafers are 10-12" in size, which makes the process much more difficult and error prone.

jecel 9y ago
The two big waferscale efforts of the 1980s were by Gene Amdahl and Clive Sinclair. Amdahl did run into technical problems connecting multiple wafers to build mainframes and using lasers to swap out bad subparts (both currently solved problems and normal industry practice). But in Sinclair's case investors pulled out despite technical success because hard disk prices started falling exponentially after having stayed stable for many years. The irony was that he had done the "silicon disk" waferscale RAM just to not scare of investors with his real goal of a manycore processor on a wafer.

deepnotderp 9y ago

Cerebras is.