I am pleasantly surprised by this reading! I have been trained as an EE to consider FPGA design in the hardware skills domain, and indeed I would say that this

I am pleasantly surprised by this reading! I have been trained as an EE to consider FPGA design in the hardware skills domain, and indeed I would say that this writeup ignores the less friendly parts of FPGA development (timing closure, clock domain crossing and more...). Nevertheless, I think it is a good introduction for software developers to start thinking like "hardware description". Good work!