5 ms·
Memory is the bottleneck... so let's use memory ever more intensely. -_- Seriously, hardware accelerated context switching is much more of a viable option rat
by deepnotderp 9y ago
Memory is the bottleneck... so let's use memory ever more intensely.
-_-
Seriously, hardware accelerated context switching is much more of a viable option rather than saying "screw registers, we'll make memory do absolutely everything. To make matters worse, in most languages you can't tell where the pointers are going before you AG them, which results in pointer chasing pain.
Stateless ISAs are interesting, but I seriously doubt the way forward is to make memory do everything for us.
Also, the biggest cost of context switching is not in the register file migration, but in the flushing of the TLBs, look to SASOS+VIVT to address that, not whatever this is proposing.
- redshirt 9y agoOne point the authors make is that registers are memory. I’m not sure they’re saying screw registers, just that they’re counter to portability and in general only a yet faster cache for programs to use. The other point they seem to make is that a secondary reason we have architected registers is that renaming over an arbitrarily large space was (and in some ways is still) difficult. By using graph coloring and reg allow in compiler, we narrow the encoding space before execution and give the hardware a much simpler problem. Recent research results on register less arch show that there are quite a few benefits. There’s a lie in calling it registerless though, it’s still there, just transparent and hence portable.
- deleted 9y ago[deleted]
- CaptainKrunch 9y ago> Stateless ISAs are interesting, but I seriously doubt the way forward is to make memory do everything for us. You're forgetting one very important thing, instructions are memory too. Right now it seems you're doubly stressing the hardware by forcing it to move data (instructions) in order to move data (actual data).
- deleted 9y ago[deleted]