3 ms·
Which sounds a bit like implementing the LLVM IR as an ISA. You don't have registers, but instead you get an infinite number of temporary values.
by woadwarrior01 9y ago
Which sounds a bit like implementing the LLVM IR as an ISA. You don't have registers, but instead you get an infinite number of temporary values.
- bob_rad 9y agoYou mean SSA right? Just about every compiler has a point at which all registers are a finite list of values (usually up to max int).