> Juggling which banks are open and closed has been traditionally a CPU's memory controller job. But communicating this information over a many-cm long PCB trac

> Juggling which banks are open and closed has been traditionally a CPU's memory controller job. But communicating this information over a many-cm long PCB trace incurs latency. So it makes more sense to put this logic as close to the RAM as possible (speed of light, capacitance, inductance, etc. etc. slow down the signal). The problem with this is that putting 'complex control logic' on the DIMM inevitably brings up the cost of a component which has a shorter lifespan than the CPU. In many applications, the RAM DIMMs are almost a 'consumable resource', in the sense that they are expected to be regularly replaced as heavy read/write cycles lead to their deterioration and eventual demise.