This has got to be very slow, both in hardware and software implementations, compared to IEEE packed decimal float. Addition and subtraction on anything other

This has got to be very slow, both in hardware and software implementations, compared to IEEE packed decimal float. Addition and subtraction on anything other than matched exponents is going to need rounds of multiplication-by-10, however you implement it. Using IEEE-754 packed decimal, you only need a handful of gates per digit to unpack into BCD.