3 ms·

This bug reminds me of the cache in-coherency bug with the xdcbt instruction of the Xbox 360 PowerPC CPU. https://randomascii.wordpress.com/2018/01/07/finding-

• comex 9y ago
  There's an even more similar bug in the PowerPC CPU used by the Wii U: all atomic operations have to perform a cache flush (dcbst) between the load-linked (lwarx) and store-conditional (stwcx) instructions, or else they won't work properly. (But I believe the issue is that the operations aren't being propagated from per-CPU caches to main memory, so it's sort of the opposite of the I.MX7 bug where operations are skipping the cache.)