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Usually newer POW algos are very memory heavy to make FPGA mining impractical.
by drcode 9y ago
Usually newer POW algos are very memory heavy to make FPGA mining impractical.
- dragontamer 9y agoBut FPGAs can interface with whatever RAM you want. If you have a memory-heavy problem, then buy expensive, high-quality RAM like RLDRAM3 or QDR-IV. In effect, think of RLDRAM3 as the "ASIC" and use the FPGA to interface with it.
- drcode 9y agoYes, they can interface with RAM, but usually at a slower speed than a GPU can interface with colocated RAM (I believe, this is a bit out of my expertise)
- dfox 9y agoFor this kind of workload it makes sense to optimize the DRAM array topology to the problem at hand, which you cannot do on GPU. That obviously means that you cannot use ready made FPGA devboard (which usuallly have quite narrow memory interfaces) but you have to design your own board.
- dragontamer 9y agoYour statement is probably true for strictly 3 GPUs: Vega 56, Vega 64, and Titan V. Because those three GPUs use next-generation stacked-die HBM2 memory. Alas: an FPGA or ASIC could ALSO use HBM2 memory (although looking into the RAM types available: Hybrid Memory Cube looks like a better fit for the Cryptocoin Proof-of-Work problems). The main issue is that stacked-memory + interposers require advanced manufacturing techniques and are incredibly expensive right now. But if the future makes this technology cheaper, then I'd expect FPGA + Hybrid Memory Cube to eventually become the ideal platform for Proof-of-Work mining. AMD really did a good job at turning HBM2 into a commodity (well, until HBM2 supplies dried up anyway). ------------- If you're talking about commodity GPUs, well... QDR-IV and RLDRAM3 have way lower latency than GDDR5, DDR4, and GDDR6. So I'd expect RLDRAM3 + FPGAs or ASIcs to beat any GDDR5 or GDDR6 based GPU at memory-hard problems.
- marshray 9y agoYes, but then you end up competing directly with the price/performance of off-the-shelf hardware. PC memory bandwidth is the best deal in computing because it's amortized across so many units. I think it would be difficult for an FPGA to beat a $200 CPU and $60 MB that has 30-50 GiB/s RAM bandwidth. (Numbers are approximate)
- dragontamer 9y agoQDR-IV and RLDRAM3 are off-the-shelf parts. Go to any supplier like Digikey (https://www.digikey.com/product-detail/en/cypress-semiconductor-corp/CY7C4122KV13-106FCXC/CY7C4122KV13-106FCXC-ND/5802600 https://www.digikey.com/product-detail/en/cypress-semiconduc...) and you can order yourself some high-speed RAM today. An FPGA or ASIC would be needed to talk to these special RAM chips, but that's a problem that can be solved. > I think it would be difficult for an FPGA to beat a $200 CPU and $60 MB that has 30-50 GiB/s RAM bandwidth. Its not bandwidth that's the problem with a lot of these chips. Its latency. QDR-IV achieves 7.5 nanoseconds of latency, while L3-cache of Ryzen or Intel Skylake achieves 10-nanoseconds, while DDR4 has latency measured in 50nanoseconds to 100-nanoseconds, depending on the CPU that's accessing it. So yes. An off-the-shelf QDR-IV chip will achieve BETTER latency numbers than your off-the-shelf computer, by significant margins. Bandwidth is basically a solved problem with regards to ASICs or FPGAs: just add another channel. Talk to 10-chips, or 20-chips at a time to have 10x or 20x the bandwidth. Latency is the hard problem, which is why I'm focusing on it.
- marshray 9y agoCommodity DDR4 costs $10/GiB on Amazon. The part you linked costs $16,497/GiB at Digikey. That's 1600x more expensive, not even counting board fabrication costs. https://www.amazon.com/Crucial-Single-PC4-19200-288-Pin-Memory/dp/B019FRDFU0/ https://www.amazon.com/Crucial-Single-PC4-19200-288-Pin-Memo...
- dragontamer 9y agoSomething like Ethash would obviously use DDR4 to store the DAG. But something like Cryptonight (which hits 2MB EXTREMELY hard) would use QDR-IV or RLDRAM 3. An ASIC / FPGA designer can use whatever part they want, for whatever part of the algorithm they want, for as many "cores" as they want. If DDR4 is the best answer to some problem in cost/effectiveness (ie: Ethash's DAG storage), then DDR4 should be used. In the case of Ethash: there is a 16 MB inner loop, which would likely be best if it were run out of RLDRAM3. The DAG portion (which can be 4GBish, maybe 8GB to be safe) would be run from DDR4. EDIT: I initially thought it was 128kb inner loop. Double-checking the specs, its 16MB, which RLDRAM3 seems like a good bet on that size. Mix-and-match parts as you see fit and imagine the best combination. That's the advantage of FPGAs and ASICs: they literally can choose any part to better match a problem. Spend expensive memory only on the portions where it is necessary.