5 ms·
You can actually see one of the pull requests about this already. [1] My favorite part about it is response to criticism that the changes may break the underly
by tedivm 9y ago
You can actually see one of the pull requests about this already. [1]
My favorite part about it is response to criticism that the changes may break the underlying cryptography they are using-
> We do not have cryptographers familiar with this kind of thing, sadly. [2]
1. https://github.com/monero-project/monero/pull/3253 https://github.com/monero-project/monero/pull/3253
2. https://github.com/monero-project/monero/pull/3253#issuecomment-365115603 https://github.com/monero-project/monero/pull/3253#issuecomm...
- dragontamer 9y agoIt not only creates a bias (which decreases entropy), but its an operation that would easily be implemented faster on an FPGA than on a CPU. I mean, its basically a singular LUT, there's nothing more efficiently done on an FPGA than LUTs. Basically, I think it actually weakens the FPGA-resistance of Cryptonight. Fortunately, the main idea of the changes would discourage ASICs being made for Monero. But it doesn't seem to discourage FPGAs, which are just one "resynthesize" away from fixing any code changes. And as long as the community becomes accustomed to regular changes, then any issues in the encryption can be fixed later.
- jmeyer2k 9y agoGenerally ASIC coins see centralization because they can control a large portion of the hash power.
- stevedc3 9y agoFPGAs cost 10x ASICs so this argument is unimportant. The reason for using ASICs is lower cost / lower compute resources.
- 28mm 9y agoI am confused by this—-aren’t ASICs the costliest option until some (high) number are fabricated and put into use? If FPGAs can implement these changes efficiently—more efficiently than cpu miners—-and be re-synthesized to implement further changes, doesn’t that advantage them?
- ethbro 9y agoParent was presumably leaving unsaid "... at scale", aka enough to move a chunk of the hash power.
- stevedc3 9y agoThanks yes I totally meant scale. Main cost of new ASIC chips is design and fabrication. Only serve a very narrow specific purpose and all that cost is sunk. But after that, unit production chip cost is negligible.
- arthurcolle 9y agodo you happen to know b/e costs given difficulty/profitability ratio using current market electricity prices?
- tfha 9y agoASICs are only costly from an R&D perspective. Which means once someone has all the R&D, they can be a monopoly and get really cheap hashrate, and since they are an incumbent monopoly it's much harder for another company to step in and complete. FPGAs don't suffer this problem
- dragontamer 9y agoI mean, a serious FPGA lab would simply keep their FPGA techniques secret until they build a sizable advantage. There's a lot of tech that would be built up: a custom memory controller, an implementation of various Cryptocoin PoW systems, and of course, the Bill of Materials for the ideal power-efficiency for various designs, etc. etc. Something like an FPGA + Interposer to HMC would be a huge R&D effort, and just as centralizing. BTW: None of the designs I've talked about are strictly speaking commodity. They'd require at a minimum, custom PCBs. Maybe more advanced techniques for the best technology (again: Custom Interposer to HMC + FPGA interface + all the Verilog / VHDL code to make it happen). As long as an FPGA-based shop kept their FPGA PCB secret, as well as their code secret, and their Device Drivers secret (You'd probably run Linux / Windows to talk to the FPGA over PCIe) then they're basically going to be ahead of the rest of the competition. Eventually, the competition would catch up, but a constant R&D effort into newer designs (ie: testing HBM2 vs HMC vs RLDRAM3 vs QDRIV, building relationships with suppliers, etc. etc.) could lead into a sustainable business edge. Heck, early on in Monero's life, some dude got to like 40%+ of the entire network's Hash Rate by simply writing better CPU code and keeping it for himself, and then spending hundreds-of-thousands of dollars on AWS: https://da-data.blogspot.com/2014/08/minting-money-with-monero-and-cpu.html https://da-data.blogspot.com/2014/08/minting-money-with-mone... > By the 14th of May, we were 45% of the total hashing power on the coin. Things started to get a little exciting FPGAs would be that on steroids. There are way fewer Verilog / FPGA engineers. It also would require custom PCBs and hardware engineers to make it all happen. I wouldn't even know who to ask to design an Hybrid Memory Cube interposer and to fit it on an FPGA for example.
- rch 9y agoI'd prefer to optimize for FPGAs over GPUs anyway.
- Analemma_ 9y ago> We do not have cryptographers familiar with this kind of thing, sadly. Heh, free money incoming if you've got a crypto background. Cryptocurrency is a nested fractal of incompetence.
- stcredzero 9y agoCryptocurrency is a nested fractal of incompetence. It works just fine if you substitute "Software development" for the 1st word.
- plasticmachine 9y agoThat's an unfair statement. The Monero Research Lab has several full-time PhD'd cryptographers who are paid for by crowdfunding from the community, just none who are specialised enough that they can comfortably sign off on the change. I think it's a good thing that those researchers don't overextend and act like they are all-knowledgeable.