3 ms·

Thanks, I now realize I hadn't been distinguishing 2 from 3. I'm still unsure about when unlamination occurs, but I'll be more careful with the term until I do

• BeeOnRope 9y ago
  Well the link above pretty much covers comprehensively when unlamination occurs, and I haven't found any discrepancies with the info there yet. In fact, I noticed that it even covers the RMW op case: indeed they still suffer unlamination of 1 of their two fused uops (probably the load/op pair since complex stores aren't unlaminated anymore on Haswell+). About RMW I wasn't trying to make any point about terminology - just mentioning pointing out that they are special in that they may micro-fuse twice (although it turns out that I was wrong and inc can't do it - but add can), unlike load-op which micro-fuse at most once. So as it turns out, there is zero extra micro-fusion going on in the "fused" vs "unfused" examples, because of the limitation wrt inc. There is still micro-fusion of the store part, but both examples get that equally. The implication is that compilers are probably better off using "add [mem], 1" in some cases over inc, since it fuses better. It wouldn't actually fuse better in this case though due to the unlamination - but if you could simplify the addressing mode it would. I wrote a reply on the blog laying this out in more detail but unfortunately Disqus "detected it as spam".