I doubt it'll be as easy as it was for 32-bit ARM because AArch64 has no (well, only a few) predicated instructions. Instead, the 64-bit ISA effectively uses th

I doubt it'll be as easy as it was for 32-bit ARM because AArch64 has no (well, only a few) predicated instructions. Instead, the 64-bit ISA effectively uses those bits to name additional registers. AArch64 already has similar code density to x86-64 anyway.