MIPS does similar things, except that the NOP is "sll r0, r0, 0", i.e. left-shift the hardwired zero register by zero, and store the result in r0. They presumab

MIPS does similar things, except that the NOP is "sll r0, r0, 0", i.e. left-shift the hardwired zero register by zero, and store the result in r0. They presumably chose this over the many other "store in R0" instructions because it encodes to 0x00000000.