If that's the case, it looks like the chip has a surprisingly modern feature set. For example, based on this article[1], the RSC on which the RAD6000 was based

If that's the case, it looks like the chip has a surprisingly modern feature set. For example, based on this article[1], the RSC on which the RAD6000 was based had an on-chip memory controller in 1992. It also had a branch predictor, however, this line is notable: > Note that the RSC never speculatively executes prefetched instructions. This means that the branch predictor only did fetch/decode, and so the chip would not have been susceptible to Spectre, as the pipeline would have been flushed and the correct instructions reloaded as soon as the condition evaluated false, before the branch would have been actually executed. [1]https://web.archive.org/web/20131004213712/http://zmoore.net/RSC%20ICCD92.pdf https://web.archive.org/web/20131004213712/http://zmoore.net...