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We've already seen the resurgence of heterogenous computing on the iPhone. The SoC inside offloads video and voice processing to dedicated ASICs. When you call
by ashleyn 9y ago
We've already seen the resurgence of heterogenous computing on the iPhone. The SoC inside offloads video and voice processing to dedicated ASICs. When you call these functions on the API, they run on the ASIC, not on the main CPU.
- pjc50 9y agoVideo processing has been offloaded in PCs for a long time; the first "3D accelerators" were in the late 90s.
- ashleyn 9y agoPerhaps I meant to say image processing. The ability to point the camera at something and make sense of the picture (FaceID, AR).
- MisterTea 9y ago> the first "3D accelerators" were in the late 90s. You forgot about SGI and I'm sure a few others like Intergraph who were doing dedicated 3D video pipelines in hardware starting in the in the 80's.
- baldfat 9y agoActually the Amiga had a GPU for 2D graphics. You need a Amiga desktop model and not a A500. The graphics shop down the road had a dozen Amigas with these cards for rendering and even ray tracing. They were pretty amazing. Even Disney used them for Beauty and the Beast and other animation at the time. http://www.amigareport.com/ar216/p1-7.html http://www.amigareport.com/ar216/p1-7.html
- D_Guidi 9y agoreally? Pretty sure OCS was the same in all Amigas
- xxs 9y agoBack in the 80s there was a co-processor known as 8087 and it was a different beast than 8086/8088. I had a computer with two different CPUs 6502 and Z80 that could actually ran them in parallel. There is nothing new about the ability to have some functionality offloaded to another processing unit regardless of the architecture.
- MisterTea 9y agoThe 8087 was the floating point co-processor or FPU for the 8086. It was not a separate CPU.
- 13of40 9y agoThe blitter, raster, and audio coprocessors on the Amiga weren't Turing complete general purpose CPUs either.
- MisterTea 9y agoThe 8087 FPU was not offloading the CPU as the CPU was halted after the FPU caught a FP instruction and made a DMA call to the CPU and took control of the bus to access what memory it had to. They were a tag-team if you will; jumping in and out of the ring to deal with their respective instructions.
- 13of40 9y agoI believe Agnus(?) and the CPU had to wait on each other for the memory bus - as evidenced by the CPU getting slower when the screen resolution was increased, due to the greater amount of video memory being read per frame.
- xxs 9y agoHalted? You had an option to WAIT for 8087 but you could 'cheat' and just run other instructions, manually calculating cycles. Thus, a system with an 8087 was capable of true parallel processing, performing one operation in the integer ALU of the main CPU while at the same time performing a floating-point operation in the 8087 coprocessor. Since the 8086 or 8088 exclusively controlled the instruction flow and timing and had no direct access to the internal status of the 8087, and because the 8087 could execute only one instruction at a time, programs for the combined 8086/8087 or 8088/8087 system had to ensure that the 8087 had time to complete the last instruction issued to it before it was issued another one. https://en.wikipedia.org/wiki/Intel_8087#Design_and_development https://en.wikipedia.org/wiki/Intel_8087#Design_and_developm...