Rolling back the cache changes is just asking for trouble. Consider that any cycles you spend undoing cache changes is also a side effect that can potentially b

Rolling back the cache changes is just asking for trouble. Consider that any cycles you spend undoing cache changes is also a side effect that can potentially be measured. Instead, hold the newly loaded cache lines in a "cache line buffer", the same way how stores are held in a store buffer. For any reads, the CPU will check the cache load buffers before L1 cache. Then once the instruction which triggered the cache read completes, the new cache line will finally be applied to the L1 cache and the old line evicted. In the case of a misprediction, the cache load buffers can be discarded instantly.