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TIS-100 Signal Averager (2016) [video]
- KirinDave 9y agoIn a post Spectre+Meltdown world, it's funny to see many propositions using Risc Architectures that will turn TIS-100-like programming from a curious mechanic of a game into potentially real life programming best practice.
- RodgerTheGreat 9y agoPerhaps the GreenArrays GA-144 shall yet see its killer app.
- Y_Y 9y agoI wish it were as easy/well-documented to code for the GA chip. I've been interested in one for ages, but never been able to get colorforth working or any of the half-written emulators. Having GA-144 in the style of TIS-100 would be fantastic.
- icefox 9y agoSignal Averager: READ VALUES FROM IN.A AND IN.B WRITE THE AVERAGE OF IN.A AND IN.B, ROUNDED DOWN, TO OUT
- logfromblammo 9y agoThe wall I was constantly beating my head against with TIS-100 was the lack of bit-shift and bitwise boolean operations. It was maddening. Also, I kept wishing for a loopback port instead of just the store/swap mechanism.
- freeone3000 9y agoShenzhen IO has these operations. They deliberately do not help. :)
- brian-armstrong 9y agoThe architecture in TIS-100 might not be binary. I think it mentions that somewhere. It's sort of a perfect puzzle ISA. I think it works extremely well for the problems given.
- rhinoceraptor 9y agoFor the last Defcon CTF, they designed an architecture specifically to be annoying, featuring 9 bit bytes and middle endianness.
- natch 9y agoWhat are we looking at here?
- AgentME 9y agoIt's a solution to one of the harder challenges in the puzzle/programming game TIS-100. In TIS-100, you have multiple parallel cores which each may have up to 15 lines of TIS-100 assembly. Each core has only one directly-accessible register and a swap instruction to swap its value with a secondary register. Each core has instructions available to send or receive values to adjacent cores. The memory, code, and layout limitations provide a lot of fun challenge to simple-ish problems.