2 ms·
Most modern FPGAs have a PLL (or DLL) implementation [0] which can multiply the external clock by some rational number. e.g. 50MHz external crystal clock is mul
by davepage 9y ago
Most modern FPGAs have a PLL (or DLL) implementation [0] which can multiply the external clock by some rational number. e.g. 50MHz external crystal clock is multiplied by 5/2 to obtain a 125MHz internal clock.
0. https://www.xilinx.com/support/documentation/user_guides/ug382.pdf https://www.xilinx.com/support/documentation/user_guides/ug3...