Thank you for watching the talks! :D Luckily its not quite as you interpreted: The L1$D is accessed in parallel with the PLB. Both at top-level caches - one

Thank you for watching the talks! :D Luckily its not quite as you interpreted: The L1$D is accessed in parallel with the PLB. Both at top-level caches - one for data, one for protection. If there is a PLB miss we have no cache-visible side-effects until the protection has been resolved. The paper we're preparing will cover this in detail, because as you can see, the talks are a bit light on exactly what happens in what order when here.