4 ms·
How did we make a similar adaptor in the 80'ies with a microprocessor running 2 MHz? Fortunately the PLA was invented. A few bits of memory and a little program
by jonsen 9y ago
How did we make a similar adaptor in the 80'ies with a microprocessor running 2 MHz?
Fortunately the PLA was invented. A few bits of memory and a little programmable logic. Enough to synchronize to the, in this case 2.35 MHz, Manchester coded bitstream and assemble the data bits into bytes.
The processor was still not fast enough to handle the control bytes of the data stream in real time. It could actually handle the controlling logic, but then it had no time left for looping around. The trick was then to disable the processors address bus during program fetching and feed it instructions from a separate ROM, controlled by another small PLA which also handled the looping.
- bsder 9y agoWhile I love this (and I am ECSTATIC about the PRU documentation ... thankyouthankyouthankyouthankyouthankyouthankyouthankyou ... I have been using this right now), I would expect this would have been loads easier with even something really cheap like a MAX10 FPGA. However, he does mention needing a network stack, so maybe not.
- sigstoat 9y ago> I would expect this would have been loads easier with even something really cheap like a MAX10 FPGA. basically nothing is easier with an FPGA. faster, perhaps.
- bsder 9y agoIf I can draw a handful of gates, an FPGA eval board is almost ALWAYS easier. I can have a MAX10 evaluation board on my desk in less than 24 hours for probably less than Osh Park charged him. The real question is how much software is required. Once I have to start writing software or Verilog/VHDL, things slow down.