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EUV Lithography Finally Ready for Chip Manufacturing
- quincunx 9y agoReally curious, how can - from a signal processing perspective - 100 applications of a 193 nm wave, come to define 7 nm features? This can't be additive, is there some form of modulation going on on the surface of the silicon? Anyone know?
- dogma1138 9y agoNothing in 7nm is actually 7nm in size same goes for all other nodes. That said patterning and interference is used to create subwavelengnt features.
- quincunx 9y agoInterference of a 193nm wave can only yield a 193nm wave, it being additive. I'm curious what is done to get to 7nm.
- anonytrary 9y agoCould a subtractive mechanism work? For example, if you want to create a 5nm bump, but you only have a 20nm thick tool to draw bumps, you could draw "everything except the 5nm bump". In other words, draw a 20nm thick annulus around a 5nm center, thereby having achieved the desired result: drawing a 5nm object with a 20nm tool. That's a toy example, idk quite how that would translate to photolithography.
- josaka 9y agoThey do something like this with sidewall patterning: https://en.wikipedia.org/wiki/Spacer_patterning https://en.wikipedia.org/wiki/Spacer_patterning
- dogma1138 9y agoIt’s not a one off etch it’s a series of etchings and depositions of material over the surface until you get the final product.
- baybal2 9y agoSelf aligning quadruple patterning https://blog.lamresearch.com/wp-content/uploads/2015/12/Self-Aligned_Quad_Patterning.jpg https://blog.lamresearch.com/wp-content/uploads/2015/12/Self... Read more here https://en.m.wikipedia.org/wiki/Multiple_patterning https://en.m.wikipedia.org/wiki/Multiple_patterning https://youtu.be/d5uoklMx63I https://youtu.be/d5uoklMx63I
- dogma1138 9y agoAs I said nothin actually goes down to 7nm but they use multiple patterning basically the exposure or lack there off can be much finer than the wavelength of the light because they expose it multiple times through slightly different patterning. Also ICs are made hang both subtractive and additive processes basically a series of exposures etches and depositions which at the end create the final product. To put it simply if you have a 5mm mill you can still make a <5 mm feature by milling around say a 1mm square.
- contrarian_ 9y agoELI5 why is the multiple patterning not additive in the same way as interference?
- QAPereo 9y agoYou’re not taking the resist mask into account, or multiple passes. https://en.m.wikipedia.org/wiki/Multiple_patterning https://en.m.wikipedia.org/wiki/Multiple_patterning Not sure how to ELI5 it though...
- posterboy 9y agoI have no idea really, but the above explanation implies reminds me on the double slit experiments. Also, inference is additive in the amplitude, but phase shifts much smaller than the wavelengths are used in interferometers to measure layer depths. https://en.wikipedia.org/wiki/Double-slit_experiment https://en.wikipedia.org/wiki/Double-slit_experiment https://en.wikipedia.org/wiki/List_of_types_of_interferometers https://en.wikipedia.org/wiki/List_of_types_of_interferomete...
- dogma1138 9y agoI believe it’s mostly single slit and diffraction, light can pass through holes smaller than its wavelength but even that isn’t needed just yet, nanophotonics will be the next step tho. http://web.eecs.utk.edu/~jaynewu/Teaching/resolution.pdf http://web.eecs.utk.edu/~jaynewu/Teaching/resolution.pdf
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- typon 9y agoMultipatterning. With cleverly designed masks, you can use the etching of a coarser layer to create finer patterns out of essentially "residuals" left behind. Repeat this process for finer and finer patterns, with error being compounded on each step. This is what the article means when they say a wafer makes 15 trips to the litho machine. With EUV, you would still need multipatterning, but less steps, which is cheaper and less error prone.
- Robotbeat 9y agoBesides multipatterning, there's also immersion photolithography. By using a liquid with an index of refraction higher than air/vacuum, you can shrink the wavelength. With an index of refraction of 2, something with a vacuum wavelength of, say, 300nm becomes 150nm. That, combined with multipatterning, can help further reduce the feature size. I think that immersion photolithography doesn't work too well with extreme UV because there aren't many liquids which are transparent in this region. EDIT: to use water as an example, you can see here why 193nm is basically the limit for the technique of immersion photolithography. The absorption spectrum is extremely steep at 193nm, so at shorter wavelengths, essentially no light gets through: http://www1.lsbu.ac.uk/water/images/water_spectrum_2.gif http://www1.lsbu.ac.uk/water/images/water_spectrum_2.gif
- BeetleB 9y agoInverse Lithography http://nanocad.ee.ucla.edu/pub/Main/SnippetTutorial/ILT.pdf http://nanocad.ee.ucla.edu/pub/Main/SnippetTutorial/ILT.pdf https://semiengineering.com/what-happened-to-inverse-lithography/ https://semiengineering.com/what-happened-to-inverse-lithogr...
- mozumder 9y agoThere are all sorts of techniques you can use to create features smaller than the wavelength. Optical Proximity Correction, Immersion, phase-shifting, multi-patterning, etc: https://en.wikipedia.org/wiki/Immersion_lithography https://en.wikipedia.org/wiki/Immersion_lithography https://en.wikipedia.org/wiki/Optical_proximity_correction https://en.wikipedia.org/wiki/Optical_proximity_correction https://en.wikipedia.org/wiki/Phase-shift_mask https://en.wikipedia.org/wiki/Phase-shift_mask https://en.wikipedia.org/wiki/Multiple_patterning https://en.wikipedia.org/wiki/Multiple_patterning
- baybal2 9y ago>EUV Lithography Finally Ready for Chip Manufacturing I have heard it every year, for the past 10 years
- ISL 9y agoThis is the first time I've heard of a 250W 19nm laser. That's a huge step forward.
- Already__Taken 9y agoThe article mentions 13.5nm. Is 19nm the wavelength used to blast the tin that re-emits as the the 13.5nm EUV source? Is that where the power is going to result in a few watts at the printing surface?
- no_flags 9y agoFirst question, no, they use CO2 lasers which emit in the um range, not nm. Probably a typo. Second question, the loss of power is due to two factors: 1) Conversion efficiency of CO2 laser pulse to EUV light pulse. This is in the single digit range as a percentage. 2) Transmission loss of EUV from light source to wafer. EUV mirrors reflect in the ballpark of 50% of the light, and there are many of them inside the scanner, so you have .5 * .5 * .5...
- no_flags 9y agoVery true, but according to the article chip makers are actually planning to use it in production this year. And they've actually started ordering more EUV systems, which is another sign it might be for real this time: http://www.electronicdesign.com/embedded-revolution/asml-orders-pile-extreme-ultraviolet-lithography http://www.electronicdesign.com/embedded-revolution/asml-ord...
- madengr 9y agoIf TSMC is getting 21E9 transistors on a 12 nm process (i.e. Nvidia Volta), then I assume a 1 nm process would be almost 3E12 transistors. That's insane! Unless power dissipation drops 144x, I can't see that happening, unless it's for memory applications. Crazy to think about though.
- deepnotderp 9y agoDennard scaling is what would allow that to happen. Unfortunately, the lesser known cousin of Moore's Law is essentially dead.
- Lind5 9y agoThere are still some pieces that need to come together on this https://semiengineering.com/issues-and-tradeoffs-for-euv/ https://semiengineering.com/issues-and-tradeoffs-for-euv/ and https://semiengineering.com/unsolved-litho-issues-at-7nm/ https://semiengineering.com/unsolved-litho-issues-at-7nm/