I think the timing is pretty perfect for a RISC-V open eco-system to flourish in a Cambrian manner. With silicon scaling laws getting walls, Intel's ability to

I think the timing is pretty perfect for a RISC-V open eco-system to flourish in a Cambrian manner. With silicon scaling laws getting walls, Intel's ability to have an efficient general purpose CPU for every workload is fading. The only way to provide better performance is to provide specialization, now. Processing will specialize in the following: * databases: SQL projections in special hardware data slicing CPU instructions. Hardware-accelerated hashing, sorting, filtering. * dynamic languages: Special code caching for JITted code. Memory models that won't have to be emulated. Memory barriers and copy on write to help the GCs do the work. * AI: We're already seeing this with Google's TPUs: Low precision tensor operations. We're going to see more specializations inside this segment too. Tensorflow today has CPU, GPU and TPU backends. In a stable high volume configuration such as vision for an autonomous car, why not provide a fourth backend for a Tensorflow pipeline: VHDL/Scala? * IoT/Sensors: Extremely low power modes, on-chip LoRa. * Network: this is already happening with microsoft using FPGAs to help do the routing. Once settled, some use cases will have their silicon edition. ---- This will lead to a thining of the margins of Intel, NVidia and ARM, to the fragmentation of the monopolies, and less money will go to the lawyers.