Very old in the arena of cryptography. No one in the CPU Architecture Design arena put 2 & 2 together [1] to realize that the same side channel that was devast

Very old in the arena of cryptography. No one in the CPU Architecture Design arena put 2 & 2 together [1] to realize that the same side channel that was devastating for cryptography work would also be quite devastating for bypassing memory permission protections in the CPU's they were designing. [1] probably because the intersection of "cryptographers who can mount timing side channel attacks" and "CPU Architecture designers" is very close to zero.