4 ms·
Can anyone layout a path to becoming as skilled in chip design as these people like John Bruno? As though I would be able to do a competent Verilog implementati
by papaver-somnamb 9y ago
Can anyone layout a path to becoming as skilled in chip design as these people like John Bruno? As though I would be able to do a competent Verilog implementation of RISC-V or 68040 in my own workshop.
As a hobby (back when I had the luxury of time) I designed several ALUs, and two CPUs featuring datapaths and register transfer control. I did them as digital circuit diagrams on paper, on breadboards (which teaches the valuable lessons of signal fanout, wire layout, debugging), and in squirrel (which teaches the value of good tooling, one way or another). I've toyed with VHDL, Verilog, and FPGAs, and am competent in assembly and C. I'm interested, but I don't know what the path forward looks like to gaining the chops that these famed designers have.
- DanBC 9y ago> As a hobby (back when I had the luxury of time) I designed several ALUs, and two CPUs featuring datapaths and register transfer control. I did them as digital circuit diagrams on paper, on breadboards (which teaches the valuable lessons of signal fanout, wire layout, debugging), and in squirrel (which teaches the value of good tooling, one way or another). I've toyed with VHDL, Verilog, and FPGAs Not an answer to your question, but I'd love to read some blog posts about this please.
- papaver-somnamb 9y agoThat's the luxury of time thing. If I was a recipient of universal basic income, it's the first item on my list. A series starting from grass roots leading to code-level manifestation and verification of landmark chips like MOS 6502, Zilog Z80 and onwards up to MIPS R4000, SuperSPARC, Intel 80486, Motorola 68040. And a deep dive to implementing a lisp-based OS and tooling to both run & compile itself, completing the circle. There is so much interesting about CPUs, from large architectural design considerations like machine type (Von-Neuman or Harvard) and MMUs through to minutiae like choice of instructions and the encoding of the instruction set, balancing the conflicting demands of instruction timing optimizations versus silicon space and power budget, math intrinsics, ... this rabbit hole runs deep. I'm starting to wonder if any one person is able to master all of the requisite topics, similar to the pseudo-fact that there is no one person who is able to manufacture a can of Coke from scratch. But, we can try, and that is where the fun is :)