3 ms·
Supposedly it creates lower power chips.
by kruhft 9y ago
Supposedly it creates lower power chips.
- QML 9y agoAre we at that point where we can have ternary signals though?
- kruhft 9y agoHere are the logic levels in standard VHDL: https://www.cs.sfu.ca/~ggbaker/reference/std_logic/1164/std_logic.html https://www.cs.sfu.ca/~ggbaker/reference/std_logic/1164/std_... Maybe some of those can be multiplexed to create Ternary chips with todays tools?