Yes. https://www.intel.com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-optimization-manual.html https://www.intel.com/content/www/us/en

Yes. https://www.intel.com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-optimization-manual.html https://www.intel.com/content/www/us/en/architecture-and-tec... Section 2.3.2.4 describes it for Sandy Bridge (and the rules don't seem to have changed in later generations): The loops with the following attributes qualify for LSD/micro-op queue replay: • Up to eight chunk fetches of 32-instruction-bytes. • Up to 28 micro-ops (~28 instructions). • All micro-ops are also resident in the Decoded ICache. • Can contain no more than eight taken branches and none of them can be a CALL or RET. • Cannot have mismatched stack operations. For example, more PUSH than POP instructions.