11 ms·
Show HN: Accelerate SHA256 Computations in Go Using AVX512 instructions
- dragonfax 9y agoIsn't this the kind of thing that was missing from the "go on different platforms" benchmark a little while back. The intel platform has crazy optimization for encryption algorithms on Inteil, while ARM was severely lacking.
- wolf550e 9y agosearch for "arm" on this list: https://dev.golang.org/reviews https://dev.golang.org/reviews
- mikebenfield 9y agoPossibly I'm confused, but in what sense is this "in Pure Go"?
- bigdubs 9y agoIt doesn't use CGO.
- gjem97 9y agoIMO, it's playing fast and loose with that term, but I guess the point is that it's not using CGO (i.e. calling into C code). It is, however, using the assembler packaged with the Go tools, so in that regard it's not "pure" go.
- stcredzero 9y agoIMO, it's playing fast and loose with that term The terminology in this context is already fast and loose: It is rigorous in a practical engineering sense and is far from a mathematical level of precision. As I pointed out above, the maintainers could just define Go to include a few Assembly languages.
- derefr 9y agoI guess in the sense that you only need the Go toolchain, rather than also needing a C toolchain to compile+link an extra C object file into your binary.
- foobarbazetc 9y agoOne thing to note is that the benchmark is running on a Skylake Platinum chip which has two AVX512 FMAs. You need a Gold 6000 series and above to see any benefit from AVX512. In most other cases the CPU throttles down some insane amount and there’s no to little benefit.
- nextos 9y agoIn this particular AVX512 use case or in most?
- jandrewrogers 9y agoThe much cheaper Xeon W-series, such as those in the iMac Pro, also have two AVX-512 FMAs.
- thecompilr 9y agoYou don't use FMA (or any multiplication) for SHA2. The throttling is a big issue.
- foobarbazetc 9y agoTrue. Did you guys get to test Epyc at CloudFlare? The 7401P seems pretty special. Like really great $ per perf. I think SuperMicro are coming out with 1 socket Epyc boards/servers.
- eloff 9y agoThis is assembly, not pure Go, but it doesn't use CGO which I probably what they mean. Intel Cannon Lake processors will support the SHA instruction extensions (currently available only on Goldmont). It will be interesting to see how that compares with this approach of running 16 SHA computations in parallel. You would be able to get rid of the scheduling overhead of having to first queue up 16 SHA calculations from other threads.
- stcredzero 9y agoThis is assembly, not pure Go Well, if you're going to dip into pedantic mode, couldn't the language maintainers just define Go to include a few relevant Assembly instruction sets? (Not taking a dig at you but rather at the above level of pendantry.)
- MaxBarraclough 9y agoNot without tying Go to one architecture, no. When C programmers write inline assembly, they don't pretend it's C code.
- deleted 9y ago[deleted]
- sythe2o0 9y agoGo has it's own form of assembly which it compiles to multiple architectures.
- npongratz 9y agoThis is interesting. A citation that helps strengthen the explanation: https://golang.org/doc/asm https://golang.org/doc/asm "The most important thing to know about Go's assembler is that it is not a direct representation of the underlying machine. Some of the details map precisely to the machine, but some do not... The details vary with architecture, and we apologize for the imprecision; the situation is not well-defined."
- wolf550e 9y agoA recent blog post by Vlad Krasnov, author of a bunch of the crypto assembly code in openssl and in golang, about frequency scaling when using AVX-512 making it not worth it: https://blog.cloudflare.com/on-the-dangers-of-intels-frequency-scaling/ https://blog.cloudflare.com/on-the-dangers-of-intels-frequen... He doesn't like the title of the OP and provided links: > Very misleading title. Could just as well name it "accelerate sha256 up to 134x". You need to compare apples to apples. If AVX2 was used in the same way AVX512 is used, the speedup would be 2X at most. Reminds me of two of my papers https://eprint.iacr.org/2012/371.pdf https://eprint.iacr.org/2012/371.pdf https://eprint.iacr.org/2012/067.pdf https://eprint.iacr.org/2012/067.pdf (from https://twitter.com/thecomp1ler/status/940724783804645376 https://twitter.com/thecomp1ler/status/940724783804645376) EDIT: Thanks 'delhanty !
- delhanty 9y agoThe twitter link needs fixing perhaps: https://twitter.com/thecomp1ler/status/940724783804645376 https://twitter.com/thecomp1ler/status/940724783804645376
- blasdel 9y agoHe's using the "cheap" Xeon Silver chips that clock down all cores immediately and aggressively when any are using AVX-512 Most of the Gold and Platinum series chips don't start frequency scaling down below baseline until around half the cores are using AVX512. The fanciest Platinum chips can use it on all cores with the only limit being that you can't Turbo quite as much: https://en.wikichip.org/wiki/intel/xeon_platinum/8180m https://en.wikichip.org/wiki/intel/xeon_platinum/8180m Without that capability, cloud providers wouldn't be able to offer multitenant VMs with access to the new instructions
- thecompilr 9y agoCan't turbo as much is still a net loss of performance. Even on Platinum turbo frequency is almost 10% lower with AVX512 on single core, and 30% lower with all cores. So you really want the majority of your software to use AVX512 to gain net benefit. It takes the system 2ms to recover after an AVX512 instruction. But you are correct that the Silvers are way worse. I suspect Intel intentionally killed AVX512 performance on the Silvers. I tested power consumption, and there is no reason to reduce the frequency, except for the sake of it. The sad thing is there is no CPUID flag to distinguish good AVX512 from useless AVX512. Would really be better if they disabled it completely on Silver. The way it is now will just hurt adoption.
- deleted 9y ago[deleted]
- ComputerGuru 9y agoI blogged about the SHA instruction support in the x86_64 ISA a few months back, it’ll be nice to see it actually happen: https://neosmart.net/blog/2017/will-amds-ryzen-finally-bring-sha-extensions-to-intels-cpus/ https://neosmart.net/blog/2017/will-amds-ryzen-finally-bring...