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Itanium had many things that needed sorting, and it would have taken one hell of a compiler to sort it all. The RISC "victory" was called in the early 90s, and
by jstewartmobile 9y ago
Itanium had many things that needed sorting, and it would have taken one hell of a compiler to sort it all.
The RISC "victory" was called in the early 90s, and it was mostly benchmarked off of late 1980s compilers that were targeted to least-common-denominator register machines, so most fancy CISC instructions were never emitted, and stack architectures were barely even a consideration.
Even on RISC-to-RISC comparisons, having a compiler that caters to your specific ISA makes a huge difference. So, if it was a victory, I wouldn't call it a clear one.
- CyberDildonics 9y agoI think anyone who tries to do a different architecture will have to put forward huge R+D themselves for proper code generation. Likely in the form of an LLVM backend, webasm JIT, maybe JVM, as well as on chip hardware techniques that at least fill the same role as OO execution. I can't think of any hardware architecture that focused on super efficient execution and let the instruction generation chips fall where they may. Maybe the Cell in the PS3. Every other successful chip has seemed to try to deal with whatever instructions it is given as best it can.