3 ms·
Actually most real RISC CPUs have no microcode, and if they do it's really just the same instruction set running out of an exception handler, not hardwired stuf
by Taniwha 9y ago
Actually most real RISC CPUs have no microcode, and if they do it's really just the same instruction set running out of an exception handler, not hardwired stuff on some other lower level private ISA
- astrodust 9y agoIs PowerPC still considered RISC? That instruction set has evolved considerably from the 601 days. What is a "real" RISC CPU? By what definition?
- Taniwha 9y agoWell, there's lots of definitions - I'd include anything that generally has: - single cycle ops - easy to decode ops (fixed size) - load/store architecture - lots of registers to reduce pressure on memory