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Also everyone is welcome to review our code and to contribute to the codebase. It is an open source project. IIT-M incubated it but we want it to be community d
by gsmadhusudan 9y ago
Also everyone is welcome to review our code and to contribute to the codebase. It is an open source project. IIT-M incubated it but we want it to be community driven. FPGA based dev packages should be announced by jan , based on standard low cost FPGA boards. Dev parts based on ASIC parts will probably be announced 2nd quarter of next year assuming Feb/March tapeout.We would be glad to help other universities do their own tapeouts. One of the goals of Shakti is also to demystify the backend process.
- ikamthania 9y agoCongratulation on the project. Where can one find the source? Is this the one? https://bitbucket.org/casl/shakti_public https://bitbucket.org/casl/shakti_public
- gsmadhusudan 9y agoYes, we will update the C Class next month since our private line has a lot of foundry specific code that needs to be removed. The I class needs more work but the design is in place. It will also move to quad issue and would be a Cortex A72/75 class core. More importantly the basic slow IPs, UART, I2C, quad/Octal SPI, SDRAM controller, JTAG, DMA, PLIC will be FPGA and silicon proven and production quality. Will be very useful to other developers (non RISC-V also) as would the AXI bus.