4 ms·
Sure, but the Game Boy’s pseudo‐Z80 has no branch prediction, register allocation, or instruction reordering. The assembly is almost one‐to‐one to the machine c
by anjbe 9y ago
Sure, but the Game Boy’s pseudo‐Z80 has no branch prediction, register allocation, or instruction reordering. The assembly is almost one‐to‐one to the machine code, and the CPU basically does everything in the straightforward way you’d expect.
- banachtarski 9y agoI was replying directly to a response which generalizes the subject of the original post.
- kbp 9y agoEven on the Gameboy things aren't quite as simple and self evident as all that, for example from another thread on this post: when the Game Boy's screen is rendering (i.e. almost all the time), the CPU doesn't have access to VRAM. [...] writes are ignored, and reads return garbage. So one of those platonic store instructions might actually be a no-op; you can't tell by looking at it in isolation.