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3nm is the physical size of the smallest dimension in the features in the chip. In 2017, the current 'node' is 7 nm. In this node, the dimension of the 'FinFET

3nm is the physical size of the smallest dimension in the features in the chip. In 2017, the current 'node' is 7 nm. In this node, the dimension of the 'FinFET Fin Width' is 4.4 nm. [0] It's fucking amazing to think that such microscopic features are repeatably produced at all, let alone at the scale of modern semiconductor fabrication. They can deposit layers of material measured in atoms. As in, 'Now I want a layer of copper 4 atoms thick' [1]. This table shows the actual measurements of the features of a device for each node: http://semiengineering.com/wp-content/uploads/2014/05/Screen-Shot-2014-05-12-at-8.04.42-AM.png http://semiengineering.com/wp-content/uploads/2014/05/Screen... [0] https://upload.wikimedia.org/wikipedia/commons/b/bb/Doublegate_FinFET.PNG https://upload.wikimedia.org/wikipedia/commons/b/bb/Doublega... [1] https://www.youtube.com/watch?v=4G8wXQGEBrA https://www.youtube.com/watch?v=4G8wXQGEBrA

ploxiln 9y ago
Correct me if I'm wrong: no one is selling any 7nm chips right now, and no one is even selling 10nm chips right now, and no one will before the end of 2017. Also worth noting, intel's 14nm is significantly smaller than samsung's 14nm: https://forums.anandtech.com/threads/how-do-global-foundries-samsung-14-nm-tsmc-16-nm-and-intel-14-nm-all-compare.2487545/ https://forums.anandtech.com/threads/how-do-global-foundries... So I don't think the answer is really that simple and straight-forward. EDIT: I was wrong, Samsung is manufacturing commercially available SoCs on its "10nm" process. But in my defense, it's comparable to Intel's 14nm process.
- deepnotderp 9y ago
  Apple is using TSMC "10nm"
Animats 9y ago
One wonders how long 3nm chips will operate. Electromigration becomes a more and more serious problem as features get smaller and you can't afford to lose many atoms from a feature. This is worse for devices that are electrically active doing something; an idle flash drive doesn't suffer from this. Will it be possible to fab a CPU at this density, or just memory devices? With memory, you can use error correction to compensate for faults. That's hard to do in logic. (Not impossible; it's been done, with CPUs that have self-checking. IBM has done that in their mainframe CPUs.)

ploxiln 9y ago

Correct me if I'm wrong: no one is selling any 7nm chips right now, and no one is even selling 10nm chips right now, and no one will before the end of 2017. Also worth noting, intel's 14nm is significantly smaller than samsung's 14nm: https://forums.anandtech.com/threads/how-do-global-foundries-samsung-14-nm-tsmc-16-nm-and-intel-14-nm-all-compare.2487545/ https://forums.anandtech.com/threads/how-do-global-foundries... So I don't think the answer is really that simple and straight-forward. EDIT: I was wrong, Samsung is manufacturing commercially available SoCs on its "10nm" process. But in my defense, it's comparable to Intel's 14nm process.

deepnotderp 9y ago
Apple is using TSMC "10nm"

Animats 9y ago

One wonders how long 3nm chips will operate. Electromigration becomes a more and more serious problem as features get smaller and you can't afford to lose many atoms from a feature. This is worse for devices that are electrically active doing something; an idle flash drive doesn't suffer from this. Will it be possible to fab a CPU at this density, or just memory devices? With memory, you can use error correction to compensate for faults. That's hard to do in logic. (Not impossible; it's been done, with CPUs that have self-checking. IBM has done that in their mainframe CPUs.)