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Hi, I'm one of the co-founders of the lowRISC project. You're right that SiFive's licensing arrangements can be somewhat confusing. Although they sell licenses
by asb 9y ago
Hi, I'm one of the co-founders of the lowRISC project. You're right that SiFive's licensing arrangements can be somewhat confusing. Although they sell licenses (like https://static.dev.sifive.com/business/sifive-license-and-support-agreement-sample-e51-20170602.pdf https://static.dev.sifive.com/business/sifive-license-and-su...) which look like a typical proprietary IP agreement, the SiFive Coreplex IP is a derivative of the open-source Rocket chip generator. SiFive was founded by a team from Berkeley who produced Rocket, and are almost certainly now the biggest contributor to ongoing Rocket development.
- phkahler 9y ago>> the SiFive Coreplex IP is a derivative of the open-source Rocket chip generator. Any idea why they didn't drop in the BOOM core then? The EE Times article puts it at 30mm^2 with the L2 cache, so even a larger BOOM core wouldn't increase the die size much. Or are they aiming for really low power first? I could see a whole family of these coming over time. I hope this all goes really well.
- _chris_ 9y agoWhile they could easily drop in a BOOM core, there would be some very non-trivial costs for SiFive to verify the IP and tune up the performance and feature set to match their costumers' needs. A lot of work has been put into Rocket once it made the transition from academic to professional and they would have to do that again for BOOM.
- jabl 9y agoAlso, there was quite recently a BOOMv2 paper describing some improvements, and hints of low-hanging fruits for further work. So I wouldn't be surprised if we'd have at least BOOMv3 before anybody commits to taping it out on ASIC.
- monocasa 9y agoThe BOOMv2 authors apparently had taped it out in TSMC 28 nm HPM.
- phkahler 9y agoYou just wrote that in response to a comment by one of the BOOM and BOOMv2 creators. And yes, there was more than just hints at low hanging fruit, so I'm hoping a v3 is in the works. But all those guys seem to be incredibly busy just giving birth to this (risc-v) thing. BTW, just to put it in writing I'm estimating the BOOMv2 clock at 2.5GHz on 28nm. Depending how much IPC they clawed back it might match the A15 on coremark.
- jabl 9y ago> You just wrote that in response to a comment by one of the BOOM and BOOMv2 creators. Oh. Oops.. :)
- opencl 9y agoThanks for the clarification, it's not at all obvious from the website. The actual target audience buying $600k core licences is probably aware of all of this anyway.
- monocasa 9y agoOff topic question: has there been any work yet on a TileLink IOMMU? I was playing around with writing one, but didn't want to put in the effort if you guys or SiFive were just around the corner from releasing your own.
- asb 9y agoIt's not something we've worked on so far at lowRISC. If SiFive have been working on something in that area I haven't seen them talk about it publicly. Sounds like a great project, if you do start working on it I'd love to discuss more.