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I'm quite excited about Risc-V as a platform - particularly security and trust-wise. It's great to see that we'll be getting competitive CPUs soon. Open hardwa

I'm quite excited about Risc-V as a platform - particularly security and trust-wise. It's great to see that we'll be getting competitive CPUs soon. Open hardware, implementing an open architecture, which can run open source software with reproducible builds. A huge win when we're facing pervasive surveillance hard-wired into current commodity systems.

monocasa 9y ago
> particularly security and trust-wise Towards that end, has there been work on a TileLink IOMMU yet?
sweden 9y ago
Open hardware? Open architecture? SiFive's solution is neither of those.
- javajosh 9y ago
  Okay, one of you is getting downvoted, but I'm not sure which one, yet.
- baobrien 9y ago
  The SiFive coreplexes themselves are based on the UCB-BAR Rocket core generator, which is open source. Most of the SiFive founders worked and still contribute to Rocket.
sigjuice 9y ago
I wish I could share your optimism :/ Nothing stops makers of RISC-V SoCs from adding their own Intel ME equivalents. Also, the CPU is just a small part of a computer, so "RISC-V" doesn't automatically translate to "open hardware" or "open architecture".
- microcolonel 9y ago
  > Also, the CPU is just a small part of a computer, so "RISC-V" doesn't automatically translate to "open hardware" or "open architecture". It is a prerequisite to it though. update: Also, they already have something acting in the role of the ME on this machine, marked E51 on the chart. I don't think it does the high level application type stuff that the ME does, but I would think it handles power management and other core duties of the ME.
  - cmrx64 9y ago
    it's owner-programmable, which is a plus.
Nokinside 9y ago
Security and trust-wise RISC-V means nothing. RISC-V is just open instruction set. Below the instruction set is microarchitecture. Some have developed low performance free microarchitectures for Risc-V but same applies to other instruction sets also. You can develop open and secure X86 microarchitecture if you want. High performance microarchitecture costs hundreds of millions of dollars to develop. Someone may develop competitive RISC-V CPU someday but it will not have open microarchitecture. AMD and Nvidia are examples of fabless companies who develop and sell proprietary microarchitectures. Thinking that someone develops open platform that competes with them is not realistic. SiFive Coreplex IP is good for microcontrollers and alike and relatively transparent but there are similar microcontroller cores available from ARM with similar transparency.
- throwaway613834 9y ago
  > You can develop open and secure X86 microarchitecture if you want. Apparently there are patent landmines you have to traverse first.
  - monocasa 9y ago
    And those landmines even blew up in Nvidia's face.
  - Nokinside 9y ago
    Instruction set can't be patented. Intel tries to patent ways to implement and functions those instructions carry. RISC-V will have less problems with those kind of patents, but it's impossible to design high-end microarchitecture without cross-licensing. I may sound negative, but I'm actually positive about RISC-V in embedded and IoT arena. People just attach too much hype for the architecture.
    - throwaway613834 9y ago
      > Instruction set can't be patented. Intel tries to patent ways to implement and functions those instructions carry. ionno, try telling that to Microsoft. This wasn't welcoming: https://arstechnica.com/information-technology/2017/06/intel-fires-warning-shots-at-microsoft-claims-x86-emulation-is-a-patent-minefield/ https://arstechnica.com/information-technology/2017/06/intel...

monocasa 9y ago

> particularly security and trust-wise Towards that end, has there been work on a TileLink IOMMU yet?

sweden 9y ago

Open hardware? Open architecture? SiFive's solution is neither of those.

javajosh 9y ago
Okay, one of you is getting downvoted, but I'm not sure which one, yet.
baobrien 9y ago
The SiFive coreplexes themselves are based on the UCB-BAR Rocket core generator, which is open source. Most of the SiFive founders worked and still contribute to Rocket.

sigjuice 9y ago

I wish I could share your optimism :/ Nothing stops makers of RISC-V SoCs from adding their own Intel ME equivalents. Also, the CPU is just a small part of a computer, so "RISC-V" doesn't automatically translate to "open hardware" or "open architecture".

microcolonel 9y ago
> Also, the CPU is just a small part of a computer, so "RISC-V" doesn't automatically translate to "open hardware" or "open architecture". It is a prerequisite to it though. update: Also, they already have something acting in the role of the ME on this machine, marked E51 on the chart. I don't think it does the high level application type stuff that the ME does, but I would think it handles power management and other core duties of the ME.
- cmrx64 9y ago
  it's owner-programmable, which is a plus.

Nokinside 9y ago

Security and trust-wise RISC-V means nothing. RISC-V is just open instruction set. Below the instruction set is microarchitecture. Some have developed low performance free microarchitectures for Risc-V but same applies to other instruction sets also. You can develop open and secure X86 microarchitecture if you want. High performance microarchitecture costs hundreds of millions of dollars to develop. Someone may develop competitive RISC-V CPU someday but it will not have open microarchitecture. AMD and Nvidia are examples of fabless companies who develop and sell proprietary microarchitectures. Thinking that someone develops open platform that competes with them is not realistic. SiFive Coreplex IP is good for microcontrollers and alike and relatively transparent but there are similar microcontroller cores available from ARM with similar transparency.

throwaway613834 9y ago
> You can develop open and secure X86 microarchitecture if you want. Apparently there are patent landmines you have to traverse first.
- monocasa 9y ago
  And those landmines even blew up in Nvidia's face.
- Nokinside 9y ago
  Instruction set can't be patented. Intel tries to patent ways to implement and functions those instructions carry. RISC-V will have less problems with those kind of patents, but it's impossible to design high-end microarchitecture without cross-licensing. I may sound negative, but I'm actually positive about RISC-V in embedded and IoT arena. People just attach too much hype for the architecture.
  - throwaway613834 9y ago
    > Instruction set can't be patented. Intel tries to patent ways to implement and functions those instructions carry. ionno, try telling that to Microsoft. This wasn't welcoming: https://arstechnica.com/information-technology/2017/06/intel-fires-warning-shots-at-microsoft-claims-x86-emulation-is-a-patent-minefield/ https://arstechnica.com/information-technology/2017/06/intel...