Nah, the problem is the SOC mental model where you don't provide a generic IO bus. What ARM/etc really needs is a device with a decent memory and PCIe interface

Nah, the problem is the SOC mental model where you don't provide a generic IO bus. What ARM/etc really needs is a device with a decent memory and PCIe interface. Random board manufactures can then glue on the ethernet/sata/USB for a few bucks a function utilizing 3rd party chips that can be found on boards frequently costing less than $10. That way instead of spending millions designing a SOC for each tier of devices you design a "generic" device and sell the ones with busted cores/cache/ram channels/whatever as low end developer machines after fusing the broken functionality off.