Last time I checked out Christiaan Baaji's CLASH, it was a Haskell DSL for generating RTL. That is neat, but it doesn't involve any LLVM-like abstraction of FP

Last time I checked out Christiaan Baaji's CLASH, it was a Haskell DSL for generating RTL. That is neat, but it doesn't involve any LLVM-like abstraction of FPGA primitives for synthesis. That would be more than neat, revolutionary really. But it would require buy-in from the major vendors, in the form of publishing many low-level device details.