You should examine why you dream of this; what is the attraction? This isn't my itch, but some possible answers could include having hardware enforced type saf

You should examine why you dream of this; what is the attraction? This isn't my itch, but some possible answers could include having hardware enforced type safety and architectural support for efficient execution. To give a rather extreme example of what is possible with a dedicated architecture, study the Reduceron [1,2]. IMO, doing something similar for Lisp would be much much easier. Could it be done? Yes, absolutely and it would be great fun. You'd have to work with an FPGA though unless you have a sizable fortune to fab a chip (though 28nm is almost affordable). [1] https://www.cs.york.ac.uk/fp/reduceron https://www.cs.york.ac.uk/fp/reduceron [2] https://github.com/tommythorn/Reduceron https://github.com/tommythorn/Reduceron PS: Reduceron has a hardware garbage collector