Wait a second, so your solution is a digital shared bus? With a need to look stuff up in a separate RAM block? Do you realize that this is pretty much the worst

Wait a second, so your solution is a digital shared bus? With a need to look stuff up in a separate RAM block? Do you realize that this is pretty much the worst thing from an energy efficiency standpoint? I've looked at the NeuroGrid link. It's still not clear to me why they want to use spikes. Some parts of their design decisions (e.g. AER bus) are forced by the need to deal with spikes, and it feels like their hardware architecture would be simpler and more efficient if they didn't. Is the only reason "biological plausibility"? Ultimately, what we want is hardware that can do what my 250 Watts 1080Ti card does (e.g. reach high classification accuracy on ImageNet) but faster and using less less power. Spikes don't seem like the best approach to achieve that.