Presumably they're already running it in a multi channel configuration, I don't have a modern MBP to check with but you need 8 individual DRAM chips per DIMM (o

Presumably they're already running it in a multi channel configuration, I don't have a modern MBP to check with but you need 8 individual DRAM chips per DIMM (or soldered on equivalent). Since the JEDEC spec for DDR3 caps each individual chip at 8Gb (1GB) they'll have 16 of them, which are probably run in dual-channel instead of dual-rank single-channel.