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One of my favorite undergrad electrical engineering classes [0] took an innovative approach to introducing this. Instead of learning about clocks/pipelines and
by btown 9y ago
One of my favorite undergrad electrical engineering classes [0] took an innovative approach to introducing this. Instead of learning about clocks/pipelines and HDL at the same time, we only looked at the former. We created our own simulators for an ARM subset, fully in C, where there was only a single for/while loop allowed in the entire codebase, representing the clock ticks. Each pipeline stage, such as Instruction Fetch, would read from a globally instantiated struct representing one set of registers, and write to another one. If you wanted to write to the same place you read from, you could only do so once, and you'd better know exactly what you were doing.
Because we didn't need to learn a new language/IDE/environment at the same time that we learned a new paradigm, we were able to keep our feet on solid ground while working things out; we were familiar with the syntax, so as soon as we realized how to "wire something up," we could do so with minimal frustration and no need/ability to Google anything. Of course, it was left to a subsequent course to learn HDL and load it on real hardware, but for a theoretical basis, this was a perfect format. Much better than written tests!
[0] http://www.cs.princeton.edu/courses/archive/fall10/cos375/descrip.html http://www.cs.princeton.edu/courses/archive/fall10/cos375/de... - see links under Design Project, specifically http://www.cs.princeton.edu/courses/archive/fall10/cos375/Cproject10.pdf http://www.cs.princeton.edu/courses/archive/fall10/cos375/Cp...
- necessity 9y agoA very good idea.
- DigitalJack 9y agoThat's a pretty interesting approach. I may have to borrow that idea.
- drharby 9y agoI want to write a letter to my alma meter now :l
- aarongolliver 9y agoI happened to do something like this in my CPU design class too. In my case I knew that writing a simulator of our design in C would be trivial compared to actually making the CPU itself + it could be used to test code much more easily (we had to write a GCD routine to "prove" it works). You're right that it helps a LOT when it comes to implementing the actual hardware. (I also put it through Vivado HLS, but I wasn't able to sneak that past the professor, rats! :) I wish I had known about verilator back then, I could have compiled the verilog into c++ and ran my simulator test suite against it!
- kchoudhu 9y agoYou really should include a trigger warning with comments like this -- I still have nightmares about that class.