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IMO, the first step for people interested in promoting RISC V should be to get it into the hands of the universities' undergrads. Berkeley's EECS 151 lab final

IMO, the first step for people interested in promoting RISC V should be to get it into the hands of the universities' undergrads. Berkeley's EECS 151 lab final semester project was to implement a RISC V CPU at 50 MHz on a FPGA. If EE/CS departments of colleges adopt RISC V hardware for teaching their students, providing cheap microcontrollers and boards to students at the start of their semester classes, those precocious little buggers are going to build Doom clones and help port their favorite flavor of linux onto them. When you've got a generation of top talent tinkering with an ISA that doesn't suck like x86, you're going to see adoption in actual industry.

noir_lord 9y ago
Amen, Unix spread that way.
- pjmlp 9y ago
  Bringing the joy of C unsafety related exploits to all OSes.
  - noir_lord 9y ago
    In fairness the landscape was very different back then.
  - zero_one_one 9y ago
    :set sarcasm Hey, That's unfair to C! If an OS is reckless enough to give a process memory when it asks for it, it should have no business worrying about what the process does with the allocation! In all seriousness though, the language can't be held responsible for poor programming practices. For any insecurities resulting from c code, blame the compiler! :)
jagger27 9y ago
I'm going to poke a few professors at Carleton to see if we can get an order of these.
QML 9y ago
I'm currently taking CS61C (Machine Structures) and part of the course focuses on RISC-V. Could you elaborate on the importantance of RISC-V? I don't think I have a formal enough background to appreciate it.
- pedroaraujo 9y ago
  It has some degree of popularity mostly because it's free, although free ISAs are not anything new (OpenSPARC for example). All the attention from RISC-V comes down to the fact that the creators like to trash talk proprietary ISAs like x86 and ARM and they like to put RISC-V under the banner of being "new and clean". This leads the average joe (and by "average joe" I mean software engineers without any background in hardware or in CPU architecture) to dream of a "Linux of CPUs", thinking they could hack something overnight and magically have a working open hardware, even though the CPU is just a small part of the entire system. At the academia level, RISC-V is a very good thing since it allows to research new kinds of architecture without being bound by proprietary ISAs. But at the industrial level, it's just hype.
  - yaantc 9y ago
    > But at the industrial level, it's just hype. Wrong. I believe most people here are focused on high performance implementation (servers, desktops, laptops) and Risc V won't get there for a long time, if at all. High performance needs very high investment, to work closely to the fabs to tweak a design to make the most of new process nodes. Only big players can afford this. So if you have only this in mind, yes Risc V may sound like hype. But there's a huge domain of embedded designs, with small scale CPU where the cost matters a lot. There are many niche players there, like Cortus, Andes, BA Semin and now SiFive. ARM is also there with Cortex M, but it's expensive and the line-up has holes (big gap between M and A/R series). Yes, ARM is expensive at the low end. ARM is cheap at the high end, when compared to Intel. Not at the low end. So far all these players have suffered from a limited ecosystem. With dedicated ISAs, each one had to support their toolchain with limited resources, and limited 3rd party support. What Risc V offers to them is the ability to leverage a significant ecosystem. They can focus on the CPU core implementation, with value added customization (extra instructions, accelerators, ...) and support, and leverage all the tooling around Risc V with much little effort. This makes a big difference. And all of them are moving to Risc V, it's their future. As a user, it does make a big difference to me. Instead of a lagging GCC toolchain, I'll soon have access to recent GCC and LLVM based tools for example. For IoT in general, Risc V offers the possibility to have an open system, which in the end means more competition and lower costs, with no lock-in from some big actors "owning" the ISA you're using. A lot of people are looking at this seriously. So no, Risc V is not hype. And there's already industrial changes. You just need to look at the deeply embedded world.
userbinator 9y ago
When you've got a generation of top talent tinkering with an ISA that doesn't suck like x86, you're going to see adoption in actual industry. RISC V is not much more than a slightly tweaked MIPS, the previous "preferred academic architecture", and we all know what happened to that... much to the chagrin of those who thought MIPS would be "the future of computing". My prediction is that it will probably replace MIPS where it's currently used (very low-end tablets and phones, and a lot of home routers), but won't really displace ARM or x86. A "pure RISC" like MIPS and now RISC V just doesn't have the "CISCness" that makes successful CPUs beyond the theoretical. https://www.extremetech.com/extreme/188396-the-final-isa-showdown-is-arm-x86-or-mips-intrinsically-more-power-efficient https://www.extremetech.com/extreme/188396-the-final-isa-sho... Look at the results for the Loongson. It has at least twice as much cache as the others and 4-way OoO, yet after normalising for clock frequency and process power, it manages to be dead last in efficiency on 3 out of 4 of the benchmarks. I've been following trends in the industry since the 90s. The "RISC dream" is still very much a dream. Trying to get an overly simple and restrictive ISA to perform well is sheer folly. Things that the RISC proponents thought would matter (decode complexity, number of architectural registers, addressing mode complexity) actually didn't, and what they thought wouldn't matter (memory bandwidth/latency, clock speed, instruction density), did. A denser, more intel-ligent (pun fully intended) ISA is what x86 and ARM is moving toward, while the MIPS/RISC advocates are going backwards.
- ant6n 9y ago
  ARM64 is CISCy?
  - theresistor 9y ago
    It's more CISCy than MIPS/RISC-V. It does a reasonably good job of having complex instructions that closely match real world patterns, as opposed to some of the crufty bits of x86 that are complex... and useless.
    - deleted 9y ago
      [deleted]

noir_lord 9y ago

Amen, Unix spread that way.

pjmlp 9y ago
Bringing the joy of C unsafety related exploits to all OSes.
- noir_lord 9y ago
  In fairness the landscape was very different back then.
- zero_one_one 9y ago
  :set sarcasm Hey, That's unfair to C! If an OS is reckless enough to give a process memory when it asks for it, it should have no business worrying about what the process does with the allocation! In all seriousness though, the language can't be held responsible for poor programming practices. For any insecurities resulting from c code, blame the compiler! :)

jagger27 9y ago

I'm going to poke a few professors at Carleton to see if we can get an order of these.

QML 9y ago

I'm currently taking CS61C (Machine Structures) and part of the course focuses on RISC-V. Could you elaborate on the importantance of RISC-V? I don't think I have a formal enough background to appreciate it.

pedroaraujo 9y ago
It has some degree of popularity mostly because it's free, although free ISAs are not anything new (OpenSPARC for example). All the attention from RISC-V comes down to the fact that the creators like to trash talk proprietary ISAs like x86 and ARM and they like to put RISC-V under the banner of being "new and clean". This leads the average joe (and by "average joe" I mean software engineers without any background in hardware or in CPU architecture) to dream of a "Linux of CPUs", thinking they could hack something overnight and magically have a working open hardware, even though the CPU is just a small part of the entire system. At the academia level, RISC-V is a very good thing since it allows to research new kinds of architecture without being bound by proprietary ISAs. But at the industrial level, it's just hype.
- yaantc 9y ago
  > But at the industrial level, it's just hype. Wrong. I believe most people here are focused on high performance implementation (servers, desktops, laptops) and Risc V won't get there for a long time, if at all. High performance needs very high investment, to work closely to the fabs to tweak a design to make the most of new process nodes. Only big players can afford this. So if you have only this in mind, yes Risc V may sound like hype. But there's a huge domain of embedded designs, with small scale CPU where the cost matters a lot. There are many niche players there, like Cortus, Andes, BA Semin and now SiFive. ARM is also there with Cortex M, but it's expensive and the line-up has holes (big gap between M and A/R series). Yes, ARM is expensive at the low end. ARM is cheap at the high end, when compared to Intel. Not at the low end. So far all these players have suffered from a limited ecosystem. With dedicated ISAs, each one had to support their toolchain with limited resources, and limited 3rd party support. What Risc V offers to them is the ability to leverage a significant ecosystem. They can focus on the CPU core implementation, with value added customization (extra instructions, accelerators, ...) and support, and leverage all the tooling around Risc V with much little effort. This makes a big difference. And all of them are moving to Risc V, it's their future. As a user, it does make a big difference to me. Instead of a lagging GCC toolchain, I'll soon have access to recent GCC and LLVM based tools for example. For IoT in general, Risc V offers the possibility to have an open system, which in the end means more competition and lower costs, with no lock-in from some big actors "owning" the ISA you're using. A lot of people are looking at this seriously. So no, Risc V is not hype. And there's already industrial changes. You just need to look at the deeply embedded world.

userbinator 9y ago

When you've got a generation of top talent tinkering with an ISA that doesn't suck like x86, you're going to see adoption in actual industry. RISC V is not much more than a slightly tweaked MIPS, the previous "preferred academic architecture", and we all know what happened to that... much to the chagrin of those who thought MIPS would be "the future of computing". My prediction is that it will probably replace MIPS where it's currently used (very low-end tablets and phones, and a lot of home routers), but won't really displace ARM or x86. A "pure RISC" like MIPS and now RISC V just doesn't have the "CISCness" that makes successful CPUs beyond the theoretical. https://www.extremetech.com/extreme/188396-the-final-isa-showdown-is-arm-x86-or-mips-intrinsically-more-power-efficient https://www.extremetech.com/extreme/188396-the-final-isa-sho... Look at the results for the Loongson. It has at least twice as much cache as the others and 4-way OoO, yet after normalising for clock frequency and process power, it manages to be dead last in efficiency on 3 out of 4 of the benchmarks. I've been following trends in the industry since the 90s. The "RISC dream" is still very much a dream. Trying to get an overly simple and restrictive ISA to perform well is sheer folly. Things that the RISC proponents thought would matter (decode complexity, number of architectural registers, addressing mode complexity) actually didn't, and what they thought wouldn't matter (memory bandwidth/latency, clock speed, instruction density), did. A denser, more intel-ligent (pun fully intended) ISA is what x86 and ARM is moving toward, while the MIPS/RISC advocates are going backwards.

ant6n 9y ago
ARM64 is CISCy?
- theresistor 9y ago
  It's more CISCy than MIPS/RISC-V. It does a reasonably good job of having complex instructions that closely match real world patterns, as opposed to some of the crufty bits of x86 that are complex... and useless.
  - deleted 9y ago
    [deleted]