6 ms·

That's not because it's slower; that's because it's the low-end (non-programmable) member of its family. It was designed by a company called Fulcrum, which pro

That's not because it's slower; that's because it's the low-end (non-programmable) member of its family. It was designed by a company called Fulcrum, which produced the FocalPoint FM2000/FM3000/FM4000 (1/10G) and FM5000/FM6000 (10G/40G) switching ASICs before being acquired by Intel. I think that a comparison to the FM4000, which is the programmable series of parts in the "Monaco" family, would be more fair. Here's their datasheet: https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/ethernet-switch-fm4000-datasheet.pdf https://www.intel.com/content/dam/www/public/us/en/documents... The FocalPoint ASICs were, as far as I know, some of the first to support (a demo-quality implementation of) OpenFlow in hardware. When Intel bought them, they released the datasheets, which is neat. As a real-world example, these ASICs were used in Arista's 7100 series (c. 2008) switches. They published a two-part "Technical Evaluation Guide" for those switches which are, among other things, an interesting glance at how switches are constructed out of ASICs. Part 1 (https://local.com.ua/forum/index.php?app=core&module=attach&section=attach&attach_id=6518 https://local.com.ua/forum/index.php?app=core&module=attach&...) shows the topology of each switch (starting on page 13). The 7124 is a single 24-port FM4224 with all 24 ports connected to front-panel ports. The 7148S has three FM4224 ASICs; each is connected to 16 front-panel ports and uses 4 ports (40 Gb/s) to connect to each of the other two ASICs in a ring. Intuitively, this means that it's possible that those inter-ASIC connections could cause bottlenecks (if e.g. all 16 ports connected to the first ASIC try to send 160 Gbit/s of traffic to the 16 connected to the second ASIC, they'll saturate the 40 Gbit/s of connectivity between the ASICs). Therefore, Arista also offered the 7148SX, which is non-blocking but needs six (!) FM4224s to make it happen!

myrandomcomment 9y ago
7148SX was not truely non-blocking. It was a Clos in a box. 4 chips in front (12 ports each, and 2 in the back, each front panel chip wired 6 ports to each of the rear chips as a LAG). If the hashes worked right it was non-blocking, but taking an Ixia out of the box and clicking go on a RFC ful mesh test would give you drops. The 7148S was created after the 7148SX shipped as a cost reduced version for those that had a workload that fit the tput characteristic. The 10GBaseT version was the same 3 chip switch. The power draw on the 10G-T phy was quite high at the time.
userbinator 9y ago
The FM4000 doesn't appear to have an actual programmable CPU either; just the same "lots of lookup tables and configuration registers" (but more of them.)
- myrandomcomment 9y ago
  The most interesting thing about the FMxxxx chips was the pipeline was async.

myrandomcomment 9y ago

7148SX was not truely non-blocking. It was a Clos in a box. 4 chips in front (12 ports each, and 2 in the back, each front panel chip wired 6 ports to each of the rear chips as a LAG). If the hashes worked right it was non-blocking, but taking an Ixia out of the box and clicking go on a RFC ful mesh test would give you drops. The 7148S was created after the 7148SX shipped as a cost reduced version for those that had a workload that fit the tput characteristic. The 10GBaseT version was the same 3 chip switch. The power draw on the 10G-T phy was quite high at the time.

userbinator 9y ago

The FM4000 doesn't appear to have an actual programmable CPU either; just the same "lots of lookup tables and configuration registers" (but more of them.)

myrandomcomment 9y ago
The most interesting thing about the FMxxxx chips was the pipeline was async.