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The article talks about the Cray XMT where each core has a run-list of tasks that it can quickly switch between each time one of them stalls on IO. Here's an a
by willvarfar 9y ago
The article talks about the Cray XMT where each core has a run-list of tasks that it can quickly switch between each time one of them stalls on IO.
Here's an approach for the massively multi-threaded CPUs that may be complimentary: versioning the memory so you can speculatively execute tasks: http://people.csail.mit.edu/sanchez/papers/2017.fractal.isca.pdf http://people.csail.mit.edu/sanchez/papers/2017.fractal.isca...
Putting it together sounds like a dream.
- CyberDildonics 9y ago> run-list of tasks that it can quickly switch between each time one of them stalls on IO Sounds like a less granular version of hyper threading. > versioning the memory so you can speculatively execute tasks The more you speculatively execute the less you actually execute. With more threads you don't have to try to squeeze more granular parallelism at the cost of diminishing returns.
- willvarfar 9y ago> The more you speculatively execute the less you actually execute True, but there are lots of graph-type problems where it is very useful. As explained in the paper I linked to?
- CyberDildonics 9y ago> As explained in the paper I linked to? Are you asking me if the paper you linked to explains it? You are saying "it's useful", I'm saying it quickly becomes too wasteful. CPUs already do speculative execution with the hopes of mitigating memory latency. I'm saying if you spend all your transistors and power doing speculative execution, it is better to find an architecture that lets you use concurrency on a much courser level so that you don't have to waste so much doing speculative execution, only to get diminishing returns for the transistors and power you put in to it.
- willvarfar 9y agoThe paper was co-authored by an NVIDIA chap, although the prototyping was x86-based. There are lots of hardware that has embarrassingly many cores which are underutilized on embarrassingly serial graph problems. Speculation is one way to get all those cores humming if you have a good heuristic for what is likely to be true and the hardware has versioned memory and hardware scheduling so as to make the speculation cheap enough. The paper gave examples of such problems.
- CyberDildonics 9y agoAgain though, it is an answer of how to speed up a graph of lots of extremely tiny operations. If every node on the graph was an operation on lots more data, you wouldn't need to solve a problem of under utilization in the first place.
- willvarfar 9y agoNow I know how Baggage felt about people wanting to slice pineapples ;) Coarse-grained SMT (what Intel call 'hyperthreading') is when a core swaps to a second task when one task stalls on a main memory access. Intel chips typically have just two tasks they can pingpong between. The Cray XMT takes this much further with a very long list of tasks it can swap between, with hardware caching, ready-monitoring and scheduling of them. This is excellent for graph problems with lots of main memory stalls. There are plenty of graph problems where there are many tasks that can make progress but they are all waiting on main memory all the time. The research I linked to takes it further and allows the tasks to be executed speculatively. Basically a tree of hardware transactional memory. Everything you say about speculation being cycles you can't use for non-speculable computation is true. But there are problems with bottlenecks that force them to be essentially serial. When cores are cheap, the problem doesn't fit in on-chip-cache and the buffers needed for SMT or SMT+speculation are affordable, speculation is a good way to utilize cores that would otherwise sit idle if that fits your power budget.
- CyberDildonics 9y ago