4 ms·

I wish there were OpenSPARC super computers in the US...

by equalunique 9y ago

monocasa 9y ago
Ehh, SPARC was a great architecture for ancient process nodes, but doesn't really line up with today's needs IMO.
- 4ad 9y ago
  Why not?
  - subway 9y ago
    Because the IP is too freely available for any one company to engage in the rent-seeking behavior the US is so fond of.
  - bsder 9y ago
    Register windows and delay slots. These turned out to be not such a great idea.
    - exikyut 9y ago
      [I'm not a microarchitecture expert] I've read that x86 has multiple registers (eg, https://news.ycombinator.com/item?id=9264195 https://news.ycombinator.com/item?id=9264195, http://blog.erratasec.com/2015/03/x86-is-high-level-language.html http://blog.erratasec.com/2015/03/x86-is-high-level-language...). "You want to do something with rax, so the processor grabs one of its 168 internal registers to play the role of rax for a moment" sounds like a type of register-window implementation to me. Or I'm completely misinterpreting the term. Note that my sentiment/tone in asking this is "huh, if that's the case then POWER and other architectures could really compete with x86!". (Assuming POWER doesn't use that approach.)
      - monocasa 9y ago
        OoO register renaming is a nearly orthogonal concept compared to SPARC style register windows. And I say nearly, mainly because if you try to implement both it increases the complexity more than you would think due to microarchitectual interactions between the two concepts. Also, it's not really an x86 thing (for instance most Atoms don't have these extra registers), it's an in-order vs out-of-order thing. Most Power cores do have the larger bank and renaming.
      - bsder 9y ago
        You are describing "register renaming". And it's what everybody discovered was a better idea than putting "specific tasks" to registers with windows, banks, etc. Of course, IBM knew about this way back. https://en.wikipedia.org/wiki/Tomasulo%27s_algorithm https://en.wikipedia.org/wiki/Tomasulo%27s_algorithm Those who do not study history are doomed to repeat it.
    - 4ad 9y ago
      What, specifically, about register windows and delay slots makes them unsuitable for today's needs? PS: read my profile description.
      - monocasa 9y ago
        They complicate OoO core design.
- gnufx 9y ago
  Well, there are half a dozen SPARC systems in the Top 500, most notably <https://www.top500.org/system/177232> https://www.top500.org/system/177232>, with substantial longevity and currently top place in the HPCG benchmark list. They reflect needs in my area, at least. See also Fujitsu's M series?

I wish there were OpenSPARC super computers in the US...

monocasa 9y ago

Ehh, SPARC was a great architecture for ancient process nodes, but doesn't really line up with today's needs IMO.

4ad 9y ago
Why not?
- subway 9y ago
  Because the IP is too freely available for any one company to engage in the rent-seeking behavior the US is so fond of.
- bsder 9y ago
  Register windows and delay slots. These turned out to be not such a great idea.
  - exikyut 9y ago
    [I'm not a microarchitecture expert] I've read that x86 has multiple registers (eg, https://news.ycombinator.com/item?id=9264195 https://news.ycombinator.com/item?id=9264195, http://blog.erratasec.com/2015/03/x86-is-high-level-language.html http://blog.erratasec.com/2015/03/x86-is-high-level-language...). "You want to do something with rax, so the processor grabs one of its 168 internal registers to play the role of rax for a moment" sounds like a type of register-window implementation to me. Or I'm completely misinterpreting the term. Note that my sentiment/tone in asking this is "huh, if that's the case then POWER and other architectures could really compete with x86!". (Assuming POWER doesn't use that approach.)
    - monocasa 9y ago
      OoO register renaming is a nearly orthogonal concept compared to SPARC style register windows. And I say nearly, mainly because if you try to implement both it increases the complexity more than you would think due to microarchitectual interactions between the two concepts. Also, it's not really an x86 thing (for instance most Atoms don't have these extra registers), it's an in-order vs out-of-order thing. Most Power cores do have the larger bank and renaming.
    - bsder 9y ago
      You are describing "register renaming". And it's what everybody discovered was a better idea than putting "specific tasks" to registers with windows, banks, etc. Of course, IBM knew about this way back. https://en.wikipedia.org/wiki/Tomasulo%27s_algorithm https://en.wikipedia.org/wiki/Tomasulo%27s_algorithm Those who do not study history are doomed to repeat it.
  - 4ad 9y ago
    What, specifically, about register windows and delay slots makes them unsuitable for today's needs? PS: read my profile description.
    - monocasa 9y ago
      They complicate OoO core design.
gnufx 9y ago
Well, there are half a dozen SPARC systems in the Top 500, most notably <https://www.top500.org/system/177232> https://www.top500.org/system/177232>, with substantial longevity and currently top place in the HPCG benchmark list. They reflect needs in my area, at least. See also Fujitsu's M series?